Re: [PATCH-for-8.2 v4 00/10] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop

[Philippe Mathieu-Daudé]

Hi Peter,

Cc'ing Mikko.

On 13/11/23 14:11, Peter Maydell wrote:
> On Thu, 9 Nov 2023 at 20:59, Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
> > Hi Peter,
> >
> > On 9/11/23 20:29, Peter Maydell wrote:
> > > On Thu, 9 Nov 2023 at 19:28, Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
> > > > Missing review: #10
> > > >
> > > > Hi,
> > > >
> > > > This series add support for (async) FIFO on the transmit path
> > > > of the PL011 UART.
> > >
> > > Hi; what's the rationale for the "for-8.2" targeting here?
> > > What bug are we fixing?
> >
> > The bug is on Trusted Substrate when the ZynqMP machine is used:
> > https://linaro.atlassian.net/browse/TRS-149?focusedCommentId=149574
>
> And have we confirmed that the async FIFO support fixes that problem?
> That bug report seems to have mostly just speculation in it that
> maybe this XXX comment is why...

Mikko tested the v2 (or v1?) and confirmed it was fixing their problem
with TRS.

That said, besides the v4 last-minute review from Richard just before
his US holiday WE, I have to sadly recognize -- although I could argue
this is a bug fix -- this series is not yet ready, thus will miss the
8.2 release :(

(Mikko: no need to test this one, I'll Cc you on the next one to get
 your Tested-by tag on the list).

Regards,

Phil.