[PATCH] hw/intc/arm_gicv3: ICC_PMR_EL1 high bits should be RAZ

[Ben Dooks]

The ICC_PMR_ELx bit msak returned from icc_fullprio_mask
should technically also remove any bit above 7 as these
are marked reserved (read 0) and should therefore should
not be written as anything other than 0.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
 hw/intc/arm_gicv3_cpuif.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c
index d07b13eb27..986044df79 100644
--- a/hw/intc/arm_gicv3_cpuif.c
+++ b/hw/intc/arm_gicv3_cpuif.c
@@ -803,7 +803,7 @@ static uint32_t icc_fullprio_mask(GICv3CPUState *cs)
      * with the group priority, whose mask depends on the value of BPR
      * for the interrupt group.)
      */
-    return ~0U << (8 - cs->pribits);
+    return (~0U << (8 - cs->pribits)) & 0xff;
 }
 
 static inline int icc_min_bpr(GICv3CPUState *cs)
-- 
2.37.2.352.g3c44437643