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[PATCH v3 0/3] Add device STM32L4x5 SYSCFG
From: |
Inès Varhol |
Subject: |
[PATCH v3 0/3] Add device STM32L4x5 SYSCFG |
Date: |
Fri, 29 Dec 2023 17:47:08 +0100 |
Changes from v2 to v3:
- updating the B-L475E-IOT01A machine's documentation file
- using `GPIO_NUM_PINS` instead of 16 in `stm32l4x5_syscfg_init`
- correcting the formatting of multiline indents
- renaming a trace function (`trace_stm32l4x5_syscfg_forward_exti`
instead of `trace_stm32l4x5_syscfg_pulse_exti`)
Changes from v1 to v2:
- explain in 3rd commit why SYSCFG input GPIOs aren't connected and add
a TODO comment in stm32l4x5_soc.c
- use macros `NUM_GPIOS` and `GPIO_NUM_PINS` in
`stm32l4x5_syscfg_set_irq`
- rename STM32L4XX to STM32L4X5, Stm32l4xx to Stm32l4x5
(the SYSCFG implementation is only valid for STM32L4x5 and STM32L4x6
but not for STM32L41xx/42xx/43xx/44xx)
- refactor `STM32L4x5SyscfgState` to `Stm32l4x5SyscfgState` to be
consistent with other peripherals
Based-on: <20231228161944.303768-1-ines.varhol@telecom-paris.fr>
([PATCH v5 0/3] Add device STM32L4x5 EXTI)
Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
Inès Varhol (3):
hw/misc: Implement STM32L4x5 SYSCFG
tests/qtest: Add STM32L4x5 SYSCFG QTest testcase
hw/arm: Connect STM32L4x5 SYSCFG to STM32L4x5 SoC
docs/system/arm/b-l475e-iot01a.rst | 2 +-
hw/arm/Kconfig | 1 +
hw/arm/stm32l4x5_soc.c | 23 +-
hw/misc/Kconfig | 3 +
hw/misc/meson.build | 1 +
hw/misc/stm32l4x5_syscfg.c | 265 ++++++++++++++++++
hw/misc/trace-events | 6 +
include/hw/arm/stm32l4x5_soc.h | 2 +
include/hw/misc/stm32l4x5_syscfg.h | 54 ++++
tests/qtest/meson.build | 3 +-
tests/qtest/stm32l4x5_syscfg-test.c | 408 ++++++++++++++++++++++++++++
11 files changed, 765 insertions(+), 3 deletions(-)
create mode 100644 hw/misc/stm32l4x5_syscfg.c
create mode 100644 include/hw/misc/stm32l4x5_syscfg.h
create mode 100644 tests/qtest/stm32l4x5_syscfg-test.c
--
2.43.0
- [PATCH v3 0/3] Add device STM32L4x5 SYSCFG,
Inès Varhol <=