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[RFC PATCH v2 12/13] hw/arm/smmuv3: Add property for OAS
From: |
Mostafa Saleh |
Subject: |
[RFC PATCH v2 12/13] hw/arm/smmuv3: Add property for OAS |
Date: |
Mon, 8 Apr 2024 14:08:17 +0000 |
Add property that sets the OAS of the SMMU, this in not used in this
patch.
Signed-off-by: Mostafa Saleh <smostafa@google.com>
---
hw/arm/smmuv3-internal.h | 3 ++-
hw/arm/smmuv3.c | 29 ++++++++++++++++++++++++++++-
include/hw/arm/smmuv3.h | 1 +
3 files changed, 31 insertions(+), 2 deletions(-)
diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h
index b0d7ad6da3..41612bb9ff 100644
--- a/hw/arm/smmuv3-internal.h
+++ b/hw/arm/smmuv3-internal.h
@@ -105,7 +105,8 @@ REG32(IDR5, 0x14)
FIELD(IDR5, VAX, 10, 2);
FIELD(IDR5, STALL_MAX, 16, 16);
-#define SMMU_IDR5_OAS 4
+#define SMMU_IDR5_OAS_DEF 4 /* 44 bits. */
+#define SMMU_IDR5_OAS_MAX 5 /* 48 bits. */
REG32(IIDR, 0x18)
REG32(AIDR, 0x1c)
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index c377c05379..a9e35c41b7 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -299,7 +299,9 @@ static void smmuv3_init_regs(SMMUv3State *s)
s->idr[3] = FIELD_DP32(s->idr[3], IDR3, RIL, 1);
s->idr[3] = FIELD_DP32(s->idr[3], IDR3, BBML, 2);
- s->idr[5] = FIELD_DP32(s->idr[5], IDR5, OAS, SMMU_IDR5_OAS); /* 44 bits */
+ /* PTW doesn't support 52 bits. */
+ s->oas = MIN(s->oas, SMMU_IDR5_OAS_MAX);
+ s->idr[5] = FIELD_DP32(s->idr[5], IDR5, OAS, s->oas);
/* 4K, 16K and 64K granule support */
s->idr[5] = FIELD_DP32(s->idr[5], IDR5, GRAN4K, 1);
s->idr[5] = FIELD_DP32(s->idr[5], IDR5, GRAN16K, 1);
@@ -1878,11 +1880,34 @@ static const VMStateDescription vmstate_gbpa = {
}
};
+static const VMStateDescription vmstate_oas = {
+ .name = "smmuv3/oas",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (const VMStateField[]) {
+ VMSTATE_INT32(oas, SMMUv3State),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static int smmuv3_preload(void *opaque)
+{
+ SMMUv3State *s = opaque;
+
+ /*
+ * In case it wasn't migrated, use the value used
+ * by older QEMU.
+ */
+ s->oas = SMMU_IDR5_OAS_DEF;
+ return 0;
+}
+
static const VMStateDescription vmstate_smmuv3 = {
.name = "smmuv3",
.version_id = 1,
.minimum_version_id = 1,
.priority = MIG_PRI_IOMMU,
+ .pre_load = smmuv3_preload,
.fields = (const VMStateField[]) {
VMSTATE_UINT32(features, SMMUv3State),
VMSTATE_UINT8(sid_size, SMMUv3State),
@@ -1910,6 +1935,7 @@ static const VMStateDescription vmstate_smmuv3 = {
},
.subsections = (const VMStateDescription * const []) {
&vmstate_gbpa,
+ &vmstate_oas,
NULL
}
};
@@ -1922,6 +1948,7 @@ static Property smmuv3_properties[] = {
* Defaults to stage 1
*/
DEFINE_PROP_STRING("stage", SMMUv3State, stage),
+ DEFINE_PROP_INT32("oas", SMMUv3State, oas, SMMU_IDR5_OAS_DEF),
DEFINE_PROP_END_OF_LIST()
};
diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h
index d183a62766..00a9eb4467 100644
--- a/include/hw/arm/smmuv3.h
+++ b/include/hw/arm/smmuv3.h
@@ -63,6 +63,7 @@ struct SMMUv3State {
qemu_irq irq[4];
QemuMutex mutex;
char *stage;
+ int32_t oas;
};
typedef enum {
--
2.44.0.478.gd926399ef9-goog
- [RFC PATCH v2 05/13] hw/arm/smmu-common: Support nested translation, (continued)
- [RFC PATCH v2 05/13] hw/arm/smmu-common: Support nested translation, Mostafa Saleh, 2024/04/08
- [RFC PATCH v2 06/13] hw/arm/smmu: Support nesting in smmuv3_range_inval(), Mostafa Saleh, 2024/04/08
- [RFC PATCH v2 09/13] hw/arm/smmuv3: Support and advertise nesting, Mostafa Saleh, 2024/04/08
- [RFC PATCH v2 07/13] hw/arm/smmu: Support nesting in the rest of commands, Mostafa Saleh, 2024/04/08
- [RFC PATCH v2 11/13] hw/arm/smmu: Refactor SMMU OAS, Mostafa Saleh, 2024/04/08
- [RFC PATCH v2 12/13] hw/arm/smmuv3: Add property for OAS,
Mostafa Saleh <=
- [RFC PATCH v2 10/13] hw/arm/smmuv3: Advertise S2FWB, Mostafa Saleh, 2024/04/08
- [RFC PATCH v2 13/13] hw/arm/virt: Set SMMU OAS based on CPU PARANGE, Mostafa Saleh, 2024/04/08
- [RFC PATCH v2 08/13] hw/arm/smmuv3: Support nested SMMUs in smmuv3_notify_iova(), Mostafa Saleh, 2024/04/08
- Re: [RFC PATCH v2 00/13] SMMUv3 nested translation support, Eric Auger, 2024/04/18