On 12/2/24 08:01, Philippe Mathieu-Daudé wrote:
- if (!dc_isar_feature(aa64_crc32, s)
- || (sf == 1 && sz != 3)
- || (sf == 0 && sz == 3)) {
We are not checking the sf bit anymore, is that intended?
Yes.
+CRC32 0 00 11010110 ..... 0100 00 ..... ..... @rrr_b
+CRC32 0 00 11010110 ..... 0100 01 ..... ..... @rrr_h
+CRC32 0 00 11010110 ..... 0100 10 ..... ..... @rrr_s
+CRC32 1 00 11010110 ..... 0100 11 ..... ..... @rrr_d
+
+CRC32C 0 00 11010110 ..... 0101 00 ..... ..... @rrr_b
+CRC32C 0 00 11010110 ..... 0101 01 ..... ..... @rrr_h
+CRC32C 0 00 11010110 ..... 0101 10 ..... ..... @rrr_s
+CRC32C 1 00 11010110 ..... 0101 11 ..... ..... @rrr_d
We are forcing sf (bit 31) to match sz (bits 10:11) in decode.