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[RFC PATCH 4/6] hw/riscv/riscv-iommu: Allow PCI hosts with iommu_ops reg


From: Jason Chien
Subject: [RFC PATCH 4/6] hw/riscv/riscv-iommu: Allow PCI hosts with iommu_ops registered connecting to the IOMMU
Date: Mon, 16 Dec 2024 08:48:55 +0800

pci_setup_iommu_downstream_mem() is called to set the downstream memory
region of the PCIe devices.

Signed-off-by: Jason Chien <jason.chien@sifive.com>
---
 hw/riscv/riscv-iommu.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c
index e9a0775d6e..f5d53a36b2 100644
--- a/hw/riscv/riscv-iommu.c
+++ b/hw/riscv/riscv-iommu.c
@@ -2436,6 +2436,14 @@ void riscv_iommu_pci_setup_iommu(RISCVIOMMUState *iommu, 
PCIBus *bus,
         QLIST_INSERT_AFTER(last, iommu, iommus);
     } else if (!bus->iommu_ops && !bus->iommu_opaque) {
         pci_setup_iommu(bus, &riscv_iommu_ops, iommu);
+    } else if (bus->iommu_ops && bus->iommu_ops->set_memory_region) {
+        /*
+         * TODO:
+         * All memory transactions of this bus will be directed to this AS.
+         * We need to distinguish the source device dynamically.
+         */
+        AddressSpace *as = riscv_iommu_space(iommu, 0);
+        pci_setup_iommu_downstream_mem(bus, as->root);
     } else {
         error_setg(errp, "can't register secondary IOMMU for PCI bus #%d",
             pci_bus_num(bus));
-- 
2.43.2




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