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[PATCH v6 40/42] nvme: change controller pci id
From: |
Klaus Jensen |
Subject: |
[PATCH v6 40/42] nvme: change controller pci id |
Date: |
Mon, 16 Mar 2020 07:29:26 -0700 |
From: Klaus Jensen <address@hidden>
There are two reasons for changing this:
1. The nvme device currently uses an internal Intel device id.
2. Since commits "nvme: fix write zeroes offset and count" and "nvme:
support multiple namespaces" the controller device no longer has
the quirks that the Linux kernel think it has.
As the quirks are applied based on pci vendor and device id, change
them to get rid of the quirks.
To keep backward compatibility, add a new 'x-use-intel-id' parameter to
the nvme device to force use of the Intel vendor and device id. This is
off by default but add a compat property to set this for machines 4.2
and older.
Signed-off-by: Klaus Jensen <address@hidden>
Reviewed-by: Keith Busch <address@hidden>
Reviewed-by: Maxim Levitsky <address@hidden>
---
hw/block/nvme.c | 13 +++++++++----
hw/block/nvme.h | 4 +++-
hw/core/machine.c | 1 +
3 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index 88a0499d0fe0..f176d859a85e 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -2493,8 +2493,15 @@ static void nvme_init_pci(NvmeCtrl *n, PCIDevice
*pci_dev)
pci_conf[PCI_INTERRUPT_PIN] = 1;
pci_config_set_prog_interface(pci_conf, 0x2);
- pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
- pci_config_set_device_id(pci_conf, 0x5845);
+
+ if (n->params.use_intel_id) {
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
+ pci_config_set_device_id(pci_conf, 0x5846);
+ } else {
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REDHAT);
+ pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_REDHAT_NVME);
+ }
+
pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_EXPRESS);
pcie_endpoint_cap_init(pci_dev, 0x80);
@@ -2669,8 +2676,6 @@ static void nvme_class_init(ObjectClass *oc, void *data)
pc->realize = nvme_realize;
pc->exit = nvme_exit;
pc->class_id = PCI_CLASS_STORAGE_EXPRESS;
- pc->vendor_id = PCI_VENDOR_ID_INTEL;
- pc->device_id = 0x5845;
pc->revision = 2;
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
diff --git a/hw/block/nvme.h b/hw/block/nvme.h
index c66f6cd8413a..70df17e6f893 100644
--- a/hw/block/nvme.h
+++ b/hw/block/nvme.h
@@ -13,7 +13,8 @@
DEFINE_PROP_UINT32("max_ioqpairs", _state, _props.max_ioqpairs, 64), \
DEFINE_PROP_UINT8("aerl", _state, _props.aerl, 3), \
DEFINE_PROP_UINT32("aer_max_queued", _state, _props.aer_max_queued, 64), \
- DEFINE_PROP_UINT8("mdts", _state, _props.mdts, 7)
+ DEFINE_PROP_UINT8("mdts", _state, _props.mdts, 7), \
+ DEFINE_PROP_BOOL("x-use-intel-id", _state, _props.use_intel_id, false)
typedef struct NvmeParams {
char *serial;
@@ -23,6 +24,7 @@ typedef struct NvmeParams {
uint8_t aerl;
uint32_t aer_max_queued;
uint8_t mdts;
+ bool use_intel_id;
} NvmeParams;
typedef struct NvmeAsyncEvent {
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 9e8c06036faf..fe7dbca0b9a2 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -39,6 +39,7 @@ GlobalProperty hw_compat_4_2[] = {
{ "usb-redir", "suppress-remote-wake", "off" },
{ "qxl", "revision", "4" },
{ "qxl-vga", "revision", "4" },
+ { "nvme", "x-use-intel-id", "on"},
};
const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2);
--
2.25.1
- Re: [PATCH v6 32/42] nvme: allow multiple aios per command, (continued)
[PATCH v6 39/42] pci: allocate pci id for nvme, Klaus Jensen, 2020/03/16
[PATCH v6 37/42] nvme: refactor identify active namespace id list, Klaus Jensen, 2020/03/16
[PATCH v6 41/42] nvme: remove redundant NvmeCmd pointer parameter, Klaus Jensen, 2020/03/16
[PATCH v6 38/42] nvme: support multiple namespaces, Klaus Jensen, 2020/03/16
[PATCH v6 40/42] nvme: change controller pci id,
Klaus Jensen <=
[PATCH v6 35/42] nvme: handle dma errors, Klaus Jensen, 2020/03/16
[PATCH v6 42/42] nvme: make lba data size configurable, Klaus Jensen, 2020/03/16
Re: [PATCH v6 00/42] nvme: support NVMe v1.3d, SGLs and multiple namespaces, no-reply, 2020/03/16
Re: [PATCH v6 00/42] nvme: support NVMe v1.3d, SGLs and multiple namespaces, Maxim Levitsky, 2020/03/25