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Re: [PATCH v6 30/42] nvme: add check for mdts
From: |
Maxim Levitsky |
Subject: |
Re: [PATCH v6 30/42] nvme: add check for mdts |
Date: |
Wed, 25 Mar 2020 12:57:04 +0200 |
On Mon, 2020-03-16 at 07:29 -0700, Klaus Jensen wrote:
> From: Klaus Jensen <address@hidden>
>
> Add 'mdts' device parameter to control the Maximum Data Transfer Size of
> the controller and check that it is respected.
>
> Signed-off-by: Klaus Jensen <address@hidden>
> ---
> hw/block/nvme.c | 29 ++++++++++++++++++++++++++++-
> hw/block/nvme.h | 4 +++-
> hw/block/trace-events | 1 +
> 3 files changed, 32 insertions(+), 2 deletions(-)
>
> diff --git a/hw/block/nvme.c b/hw/block/nvme.c
> index ba520c76bae5..7d5340c272c6 100644
> --- a/hw/block/nvme.c
> +++ b/hw/block/nvme.c
> @@ -19,7 +19,8 @@
> * -drive file=<file>,if=none,id=<drive_id>
> * -device nvme,drive=<drive_id>,serial=<serial>,id=<id[optional]>, \
> * cmb_size_mb=<cmb_size_mb[optional]>, \
> - * max_ioqpairs=<N[optional]>
> + * max_ioqpairs=<N[optional]>, \
> + * mdts=<mdts[optional]>
> *
> * Note cmb_size_mb denotes size of CMB in MB. CMB is assumed to be at
> * offset 0 in BAR2 and supports only WDS, RDS and SQS for now.
> @@ -491,6 +492,19 @@ static void nvme_clear_events(NvmeCtrl *n, uint8_t
> event_type)
> }
> }
>
> +static inline uint16_t nvme_check_mdts(NvmeCtrl *n, size_t len,
> + NvmeRequest *req)
> +{
> + uint8_t mdts = n->params.mdts;
> +
> + if (mdts && len > n->page_size << mdts) {
> + trace_nvme_dev_err_mdts(nvme_cid(req), n->page_size << mdts, len);
> + return NVME_INVALID_FIELD | NVME_DNR;
> + }
> +
> + return NVME_SUCCESS;
> +}
> +
> static inline uint16_t nvme_check_bounds(NvmeCtrl *n, NvmeNamespace *ns,
> uint64_t slba, uint32_t nlb,
> NvmeRequest *req)
> @@ -581,6 +595,12 @@ static uint16_t nvme_rw(NvmeCtrl *n, NvmeNamespace *ns,
> NvmeCmd *cmd,
>
> trace_nvme_dev_rw(is_write ? "write" : "read", nlb, data_size, slba);
>
> + status = nvme_check_mdts(n, data_size, req);
> + if (status) {
> + block_acct_invalid(blk_get_stats(n->conf.blk), acct);
> + return status;
> + }
> +
> status = nvme_check_bounds(n, ns, slba, nlb, req);
> if (status) {
> block_acct_invalid(blk_get_stats(n->conf.blk), acct);
> @@ -871,6 +891,7 @@ static uint16_t nvme_get_log(NvmeCtrl *n, NvmeCmd *cmd,
> NvmeRequest *req)
> uint32_t numdl, numdu;
> uint64_t off, lpol, lpou;
> size_t len;
> + uint16_t status;
>
> numdl = (dw10 >> 16);
> numdu = (dw11 & 0xffff);
> @@ -886,6 +907,11 @@ static uint16_t nvme_get_log(NvmeCtrl *n, NvmeCmd *cmd,
> NvmeRequest *req)
>
> trace_nvme_dev_get_log(nvme_cid(req), lid, lsp, rae, len, off);
>
> + status = nvme_check_mdts(n, len, req);
> + if (status) {
> + return status;
> + }
> +
> switch (lid) {
> case NVME_LOG_ERROR_INFO:
> return nvme_error_info(n, cmd, rae, len, off, req);
> @@ -2011,6 +2037,7 @@ static void nvme_init_ctrl(NvmeCtrl *n)
> id->ieee[0] = 0x00;
> id->ieee[1] = 0x02;
> id->ieee[2] = 0xb3;
> + id->mdts = params->mdts;
> id->ver = cpu_to_le32(NVME_SPEC_VER);
> id->oacs = cpu_to_le16(0);
>
> diff --git a/hw/block/nvme.h b/hw/block/nvme.h
> index 442b17bf1701..b05c2153aebf 100644
> --- a/hw/block/nvme.h
> +++ b/hw/block/nvme.h
> @@ -9,7 +9,8 @@
> DEFINE_PROP_UINT32("num_queues", _state, _props.num_queues, 0), \
> DEFINE_PROP_UINT32("max_ioqpairs", _state, _props.max_ioqpairs, 64), \
> DEFINE_PROP_UINT8("aerl", _state, _props.aerl, 3), \
> - DEFINE_PROP_UINT32("aer_max_queued", _state, _props.aer_max_queued, 64)
> + DEFINE_PROP_UINT32("aer_max_queued", _state, _props.aer_max_queued, 64),
> \
> + DEFINE_PROP_UINT8("mdts", _state, _props.mdts, 7)
>
> typedef struct NvmeParams {
> char *serial;
> @@ -18,6 +19,7 @@ typedef struct NvmeParams {
> uint32_t cmb_size_mb;
> uint8_t aerl;
> uint32_t aer_max_queued;
> + uint8_t mdts;
> } NvmeParams;
>
> typedef struct NvmeAsyncEvent {
> diff --git a/hw/block/trace-events b/hw/block/trace-events
> index e31e652fa04e..2df6aa38df1b 100644
> --- a/hw/block/trace-events
> +++ b/hw/block/trace-events
> @@ -79,6 +79,7 @@ nvme_dev_mmio_doorbell_cq(uint16_t cqid, uint16_t new_head)
> "cqid %"PRIu16" new_
> nvme_dev_mmio_doorbell_sq(uint16_t sqid, uint16_t new_tail) "cqid %"PRIu16"
> new_tail %"PRIu16""
>
> # nvme traces for error conditions
> +nvme_dev_err_mdts(uint16_t cid, size_t mdts, size_t len) "cid %"PRIu16" mdts
> %"PRIu64" len %"PRIu64""
> nvme_dev_err_invalid_dma(void) "PRP/SGL is too small for transfer size"
> nvme_dev_err_invalid_prplist_ent(uint64_t prplist) "PRP list entry is null
> or not page aligned: 0x%"PRIx64""
> nvme_dev_err_invalid_prp2_align(uint64_t prp2) "PRP2 is not page aligned:
> 0x%"PRIx64""
Reviewed-by: Maxim Levitsky <address@hidden>
Best regards,
Maxim Levitsky
- [PATCH v6 29/42] nvme: refactor request bounds checking, (continued)
- [PATCH v6 27/42] nvme: add request mapping helper, Klaus Jensen, 2020/03/16
- [PATCH v6 28/42] nvme: verify validity of prp lists in the cmb, Klaus Jensen, 2020/03/16
- [PATCH v6 34/42] pci: pass along the return value of dma_memory_rw, Klaus Jensen, 2020/03/16
- [PATCH v6 30/42] nvme: add check for mdts, Klaus Jensen, 2020/03/16
- Re: [PATCH v6 30/42] nvme: add check for mdts,
Maxim Levitsky <=
- [PATCH v6 26/42] nvme: pass request along for tracing, Klaus Jensen, 2020/03/16
- [PATCH v6 33/42] nvme: use preallocated qsg/iov in nvme_dma_prp, Klaus Jensen, 2020/03/16
- [PATCH v6 31/42] nvme: add check for prinfo, Klaus Jensen, 2020/03/16
[PATCH v6 25/42] nvme: refactor dma read/write, Klaus Jensen, 2020/03/16