[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v2 02/12] hw/block/nvme: fix 64 bit register hi/lo split writ
|
From: |
Klaus Jensen |
|
Subject: |
Re: [PATCH v2 02/12] hw/block/nvme: fix 64 bit register hi/lo split writes |
|
Date: |
Mon, 18 Jan 2021 20:53:24 +0100 |
On Jan 18 21:59, Minwoo Im wrote:
> > The spec requires aligned 32 bit accesses (or the size of the register),
> > so maybe it's about time we actually ignore instead of falling through.
>
> Agreed.
>
On the other hand.
The spec just allows undefined behavior if the alignment or size
requirement is violated. So falling through is not wrong.
Keith, any thoughts on this?
signature.asc
Description: PGP signature
[PATCH v2 03/12] hw/block/nvme: indicate CMB support through controller capabilities register, Klaus Jensen, 2021/01/18
[PATCH v2 04/12] hw/block/nvme: move msix table and pba to BAR 0, Klaus Jensen, 2021/01/18
[PATCH v2 05/12] hw/block/nvme: allow cmb and pmr to coexist, Klaus Jensen, 2021/01/18
[PATCH v2 06/12] hw/block/nvme: rename PMR/CMB shift/mask fields, Klaus Jensen, 2021/01/18