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[PULL 14/15] Revert "hw/block/nvme: add support for sgl bit bucket descr
From: |
Klaus Jensen |
Subject: |
[PULL 14/15] Revert "hw/block/nvme: add support for sgl bit bucket descriptor" |
Date: |
Thu, 23 Jun 2022 23:34:41 +0200 |
From: Klaus Jensen <k.jensen@samsung.com>
This reverts commit d97eee64fef35655bd06f5c44a07fdb83a6274ae.
The emulated controller correctly accounts for not including bit buckets
in the controller-to-host data transfer, however it doesn't correctly
account for the holes for the on-disk data offsets.
Reported-by: Keith Busch <kbusch@kernel.org>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
---
hw/nvme/ctrl.c | 29 ++++++-----------------------
1 file changed, 6 insertions(+), 23 deletions(-)
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index a558f5cb29c1..15d580a904ef 100644
--- a/hw/nvme/ctrl.c
+++ b/hw/nvme/ctrl.c
@@ -850,10 +850,6 @@ static uint16_t nvme_map_sgl_data(NvmeCtrl *n, NvmeSg *sg,
uint8_t type = NVME_SGL_TYPE(segment[i].type);
switch (type) {
- case NVME_SGL_DESCR_TYPE_BIT_BUCKET:
- if (cmd->opcode == NVME_CMD_WRITE) {
- continue;
- }
case NVME_SGL_DESCR_TYPE_DATA_BLOCK:
break;
case NVME_SGL_DESCR_TYPE_SEGMENT:
@@ -886,10 +882,6 @@ static uint16_t nvme_map_sgl_data(NvmeCtrl *n, NvmeSg *sg,
trans_len = MIN(*len, dlen);
- if (type == NVME_SGL_DESCR_TYPE_BIT_BUCKET) {
- goto next;
- }
-
addr = le64_to_cpu(segment[i].addr);
if (UINT64_MAX - addr < dlen) {
@@ -901,7 +893,6 @@ static uint16_t nvme_map_sgl_data(NvmeCtrl *n, NvmeSg *sg,
return status;
}
-next:
*len -= trans_len;
}
@@ -959,8 +950,7 @@ static uint16_t nvme_map_sgl(NvmeCtrl *n, NvmeSg *sg,
NvmeSglDescriptor sgl,
seg_len = le32_to_cpu(sgld->len);
/* check the length of the (Last) Segment descriptor */
- if ((!seg_len || seg_len & 0xf) &&
- (NVME_SGL_TYPE(sgld->type) != NVME_SGL_DESCR_TYPE_BIT_BUCKET)) {
+ if (!seg_len || seg_len & 0xf) {
return NVME_INVALID_SGL_SEG_DESCR | NVME_DNR;
}
@@ -998,26 +988,20 @@ static uint16_t nvme_map_sgl(NvmeCtrl *n, NvmeSg *sg,
NvmeSglDescriptor sgl,
last_sgld = &segment[nsgld - 1];
/*
- * If the segment ends with a Data Block or Bit Bucket Descriptor Type,
- * then we are done.
+ * If the segment ends with a Data Block, then we are done.
*/
- switch (NVME_SGL_TYPE(last_sgld->type)) {
- case NVME_SGL_DESCR_TYPE_DATA_BLOCK:
- case NVME_SGL_DESCR_TYPE_BIT_BUCKET:
+ if (NVME_SGL_TYPE(last_sgld->type) == NVME_SGL_DESCR_TYPE_DATA_BLOCK) {
status = nvme_map_sgl_data(n, sg, segment, nsgld, &len, cmd);
if (status) {
goto unmap;
}
goto out;
-
- default:
- break;
}
/*
- * If the last descriptor was not a Data Block or Bit Bucket, then the
- * current segment must not be a Last Segment.
+ * If the last descriptor was not a Data Block, then the current
+ * segment must not be a Last Segment.
*/
if (NVME_SGL_TYPE(sgld->type) == NVME_SGL_DESCR_TYPE_LAST_SEGMENT) {
status = NVME_INVALID_SGL_SEG_DESCR | NVME_DNR;
@@ -7286,8 +7270,7 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice
*pci_dev)
id->vwc = NVME_VWC_NSID_BROADCAST_SUPPORT | NVME_VWC_PRESENT;
id->ocfs = cpu_to_le16(NVME_OCFS_COPY_FORMAT_0 | NVME_OCFS_COPY_FORMAT_1);
- id->sgls = cpu_to_le32(NVME_CTRL_SGLS_SUPPORT_NO_ALIGN |
- NVME_CTRL_SGLS_BITBUCKET);
+ id->sgls = cpu_to_le32(NVME_CTRL_SGLS_SUPPORT_NO_ALIGN);
nvme_init_subnqn(n);
--
2.36.1
- [PULL 04/15] hw/nvme: Implement the Function Level Reset, (continued)
- [PULL 04/15] hw/nvme: Implement the Function Level Reset, Klaus Jensen, 2022/06/23
- [PULL 05/15] hw/nvme: Make max_ioqpairs and msix_qsize configurable in runtime, Klaus Jensen, 2022/06/23
- [PULL 06/15] hw/nvme: Remove reg_size variable and update BAR0 size calculation, Klaus Jensen, 2022/06/23
- [PULL 07/15] hw/nvme: Calculate BAR attributes in a function, Klaus Jensen, 2022/06/23
- [PULL 08/15] hw/nvme: Initialize capability structures for primary/secondary controllers, Klaus Jensen, 2022/06/23
- [PULL 09/15] hw/nvme: Add support for the Virtualization Management command, Klaus Jensen, 2022/06/23
- [PULL 10/15] docs: Add documentation for SR-IOV and Virtualization Enhancements, Klaus Jensen, 2022/06/23
- [PULL 11/15] hw/nvme: Update the initalization place for the AER queue, Klaus Jensen, 2022/06/23
- [PULL 12/15] hw/acpi: Make the PCI hot-plug aware of SR-IOV, Klaus Jensen, 2022/06/23
- [PULL 13/15] hw/nvme: clean up CC register write logic, Klaus Jensen, 2022/06/23
- [PULL 14/15] Revert "hw/block/nvme: add support for sgl bit bucket descriptor",
Klaus Jensen <=
- [PULL 15/15] hw/nvme: clear aen mask on reset, Klaus Jensen, 2022/06/23