Re: [PATCH v2 04/15] hw/isa/vt82c686: Define a GPIO line between vt82c686 and i8259

[Akihiko Odaki]

On 2024/06/29 22:08, BALATON Zoltan wrote:
> On Thu, 27 Jun 2024, Akihiko Odaki wrote:
> > This fixes qemu_irq array leak.
> >
> > Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
> > ---
> > hw/isa/vt82c686.c | 7 ++++---
> > 1 file changed, 4 insertions(+), 3 deletions(-)
> >
> > diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
> > index 8582ac0322eb..629d2d568137 100644
> > --- a/hw/isa/vt82c686.c
> > +++ b/hw/isa/vt82c686.c
> > @@ -715,13 +715,14 @@ static void via_isa_realize(PCIDevice *d, Error 
> > **errp)
> >     ViaISAState *s = VIA_ISA(d);
> >     DeviceState *dev = DEVICE(d);
> >     PCIBus *pci_bus = pci_get_bus(d);
> > -    qemu_irq *isa_irq;
> > +    qemu_irq isa_irq;
> >     ISABus *isa_bus;
> >     int i;
> >
> >     qdev_init_gpio_out(dev, &s->cpu_intr, 1);
> >     qdev_init_gpio_in_named(dev, via_isa_pirq, "pirq", PCI_NUM_PINS);
> > -    isa_irq = qemu_allocate_irqs(via_isa_request_i8259_irq, s, 1);
> > +    qdev_init_gpio_in_named(dev, via_isa_request_i8259_irq, "i8259", 1);
>
> The chip has no such pin so this is a QEMU internal connection that I 
> think should not be modelled with a named gpio. I think we really need a 
> function to init a qemu_irq (for now we only have one that also 
> allocares it) so then we can put this in ViaISAState and init in place. 
> I'll make a patch.

According to qdev_pass_gpios(), it is valid to have a GPIO line even if 
a QOM device to be connected with the GPIO line is actually included in 
one chip package. I didn't use qdev_pass_gpios() because it cannot 
expose a subset of the GPIO array.

Regards,
Akihiko Odaki