Re: [PATCH v3 5/8] aspeed/soc: set dma64 property for AST2700 ftgmac100

[Cédric Le Goater]

On 7/4/24 10:29 AM, Jamin Lin wrote:
> ASPEED AST2700 SOC is a 64 bits quad core CPUs (Cortex-a35)
> And the base address of dram is "0x4 00000000" which
> is 64bits address.
>
> Set dma64 property for ftgmac100 model to support
> 64bits dram address DMA.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>


Reviewed-by: Cédric Le Goater <clg@redhat.com>

Thanks,

C.


> ---
>   hw/arm/aspeed_ast27x0.c | 3 +++
>   1 file changed, 3 insertions(+)
>
> diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
> index 18e6a8b10c..a9fb0d4b88 100644
> --- a/hw/arm/aspeed_ast27x0.c
> +++ b/hw/arm/aspeed_ast27x0.c
> @@ -552,9 +552,12 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, 
> Error **errp)
>           return;
>       }
>   
> +    /* Net */
>       for (i = 0; i < sc->macs_num; i++) {
>           object_property_set_bool(OBJECT(&s->ftgmac100[i]), "aspeed", true,
>                                    &error_abort);
> +        object_property_set_bool(OBJECT(&s->ftgmac100[i]), "dma64", true,
> +                                 &error_abort);
>           if (!sysbus_realize(SYS_BUS_DEVICE(&s->ftgmac100[i]), errp)) {
>               return;
>           }