[Qemu-commits] [qemu/qemu] 28290f: PPC: E500: Generate device tree on re

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[Qemu-commits] [qemu/qemu] 28290f: PPC: E500: Generate device tree on re

From:	GitHub
Subject:	[Qemu-commits] [qemu/qemu] 28290f: PPC: E500: Generate device tree on reset
Date:	Mon, 02 Sep 2013 23:30:11 -0700
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 28290f37e20cda27574f15be9e9499493e3d0fe8
      
https://github.com/qemu/qemu/commit/28290f37e20cda27574f15be9e9499493e3d0fe8
  Author: Alexander Graf <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M hw/ppc/e500.c

  Log Message:
  -----------
  PPC: E500: Generate device tree on reset

Today we generate the device tree once on machine initialization and then
store the finalized blob in memory to reload it on reset.

This is bad for 2 reasons. First we potentially waste a bunch of RAM for no
good reason, as we have all information required to regenerate the device
tree available anyways.

The second reason is even more important. On machine init when we generate
the device tree for the first time, we don't have all of the devices fully
initialized yet. But the device tree needs to potentially walk devices to
put information about them into the device tree.

Move the generation into a reset function. That way we just generate it new
every time we reset, solving both of the above issues.

Signed-off-by: Alexander Graf <address@hidden>


  Commit: 7770b6f78a2d655e03852a5de238f5926c92be6a
      
https://github.com/qemu/qemu/commit/7770b6f78a2d655e03852a5de238f5926c92be6a
  Author: Anton Blanchard <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M hw/char/spapr_vty.c

  Log Message:
  -----------
  pseries: Fix stalls on hypervisor virtual console

A number of users are reporting stalls when using the pseries
hypervisor virtual console.

A simple test case is to paste 15 or 17 characters at a time
into the console. Pasting 15 characters at a time works fine
but pasting 17 characters hangs for a random amount of time.
Other activity (network, qemu monitor etc) unblocks it.

If qemu-char tries to send more than 16 characters at once,
vty_can_receive returns false. At this point we have to
wait for the guest to consume that output. Everything is good
so far.

The problem occurs when the the guest does consume the output.
We need to signal back to the qemu-char layer that we are
ready for more input. Without this we block until something
else kicks us (eg network activity).

Signed-off-by: Anton Blanchard <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 1e0c7e554e449abb7bf759339ca2cf8cda232532
      
https://github.com/qemu/qemu/commit/1e0c7e554e449abb7bf759339ca2cf8cda232532
  Author: Anton Blanchard <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M target-ppc/cpu.h
    M target-ppc/excp_helper.c

  Log Message:
  -----------
  target-ppc: USE LPCR_ILE to control exception endian on POWER7

On POWER7, LPCR_ILE is used to control what endian guests take
their exceptions in so use it instead of MSR_ILE.

Signed-off-by: Anton Blanchard <address@hidden>
Reviewed-by: Anthony Liguori <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: bb429d224733c263456c105eab93cd2b5e55add2
      
https://github.com/qemu/qemu/commit/bb429d224733c263456c105eab93cd2b5e55add2
  Author: Anton Blanchard <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M target-ppc/translate_init.c

  Log Message:
  -----------
  target-ppc: POWER7 supports the MSR_LE bit

Add MSR_LE to the msr_mask for POWER7.

Signed-off-by: Anton Blanchard <address@hidden>
Reviewed-by: Anthony Liguori <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 95f5b6e3af28a24f97b25649e12f586e19e8a4a1
      
https://github.com/qemu/qemu/commit/95f5b6e3af28a24f97b25649e12f586e19e8a4a1
  Author: Anton Blanchard <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M disas/ppc.c

  Log Message:
  -----------
  disas/ppc.c: Fix little endian disassembly

Use info->endian to select the endian of the instruction to
be disassembled.

Signed-off-by: Anton Blanchard <address@hidden>
Reviewed-by: Anthony Liguori <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: daf285b6063f20c328f03d6185bbfe9b81ce5fe2
      
https://github.com/qemu/qemu/commit/daf285b6063f20c328f03d6185bbfe9b81ce5fe2
  Author: Efimov Vasily <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M hw/ppc/virtex_ml507.c

  Log Message:
  -----------
  ppc: virtex_ml507: QEMU_OPTION_dtb support for this machine.

QEMU has 'dtb' option for specifing the device tree file for the kernel.
The patch adds support for this option to the 'virtex_ml507' machine
implementation.

Signed-off-by: Efimov Vasily <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: bf2ed917d77489189e7bcfea629ca030c8e2639d
      
https://github.com/qemu/qemu/commit/bf2ed917d77489189e7bcfea629ca030c8e2639d
  Author: Andreas Färber <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M hw/ppc/ppc405_boards.c

  Log Message:
  -----------
  ppc405_boards: Disable debug output

Also move one stray debug output into an #ifdef.

Signed-off-by: Andreas Färber <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 0d84382ed96cb2cfc3bc5be34d3a045eeb69c9dc
      
https://github.com/qemu/qemu/commit/0d84382ed96cb2cfc3bc5be34d3a045eeb69c9dc
  Author: Andreas Färber <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M hw/ppc/ppc405_uc.c

  Log Message:
  -----------
  ppc405_uc: Disable debug output

Signed-off-by: Andreas Färber <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: ad9990acc5ac29ce505fbb2b955928ce335eddfd
      
https://github.com/qemu/qemu/commit/ad9990acc5ac29ce505fbb2b955928ce335eddfd
  Author: Andreas Färber <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M hw/ppc/ppc405_boards.c

  Log Message:
  -----------
  ppc405_boards: Don't enforce presence of firmware for qtest

Adopt error_report() while at it.

Signed-off-by: Andreas Färber <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 779f659021d1754117bce1aab9370dc22f37ae07
      
https://github.com/qemu/qemu/commit/779f659021d1754117bce1aab9370dc22f37ae07
  Author: Aurelien Jarno <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M target-ppc/translate.c

  Log Message:
  -----------
  target-ppc: fix bit extraction for FPBF and FPL

Bit extraction for the FP BF and L field of the MTFSFI and MTFSF
instructions is wrong and doesn't match the reference manual (which
explain the bit number in big endian format). It has been broken in
commit 7d08d85645def18eac2a9d672c1868a35e0bcf79.

This patch fixes this, which in turn fixes the problem reported by
Khem Raj about the floor() function of libm.

Reported-by: Khem Raj <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
CC: address@hidden (1.6)
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 5dac82ce0d8716b54f73f96bf50811644a76e5c2
      
https://github.com/qemu/qemu/commit/5dac82ce0d8716b54f73f96bf50811644a76e5c2
  Author: Alexey Kardashevskiy <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M hw/ppc/spapr_pci.c

  Log Message:
  -----------
  spapr-pci: fix config space access to support bridges

spapr-pci config space accessors use find_dev() to find a PCI device.
However find_dev() only searched on a primary bus and did not do
recursive search through secondary buses so config space access was not
possible for devices other that on a primary bus.

This fixed find_dev() by using the PCI API pci_find_device() function.
This effectively enabled pci bridges on spapr.

Signed-off-by: Alexey Kardashevskiy <address@hidden>
Acked-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: a3cedb541ca3ecc82040f597a4054419fdb22fa5
      
https://github.com/qemu/qemu/commit/a3cedb541ca3ecc82040f597a4054419fdb22fa5
  Author: Aneesh Kumar K.V <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M target-ppc/mmu_helper.c

  Log Message:
  -----------
  target-ppc: Use #define instead of opencoding SLB valid bit

Use SLB_ESID_V instead of (1 << 27) in the code

Reviewed-by: Andreas Färber <address@hidden>
Signed-off-by: Aneesh Kumar K.V <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: f1c2dc7c866a939c39c14729290a21309a1c8a38
      
https://github.com/qemu/qemu/commit/f1c2dc7c866a939c39c14729290a21309a1c8a38
  Author: Alexey Kardashevskiy <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M hw/ppc/spapr.c
    M hw/ppc/spapr_pci.c
    M include/hw/pci-host/spapr.h
    M include/hw/ppc/spapr.h

  Log Message:
  -----------
  spapr-pci: rework MSI/MSIX

On the sPAPR platform a guest allocates MSI/MSIX vectors via RTAS
hypercalls which return global IRQ numbers to a guest so it only
operates with those and never touches MSIMessage.

Therefore MSIMessage handling is completely hidden in QEMU.

Previously every sPAPR PCI host bridge implemented its own MSI window
to catch msi_notify()/msix_notify() calls from QEMU devices (virtio-pci
or vfio) and route them to the guest via qemu_pulse_irq().
MSIMessage used to be encoded as:
        .addr - address within the PHB MSI window;
        .data - the device index on PHB plus vector number.
The MSI MR write function translated this MSIMessage to a global IRQ
number and called qemu_pulse_irq().

However the total number of IRQs is not really big (at the moment it is
1024 IRQs starting from 4096) and even 16bit data field of MSIMessage
seems to be enough to store an IRQ number there.

This simplifies MSI handling in sPAPR PHB. Specifically, this does:
1. remove a MSI window from a PHB;
2. add a single memory region for all MSIs to sPAPREnvironment
and spapr_pci_msi_init() to initialize it;
3. encode MSIMessage as:
    * .addr - a fixed address of SPAPR_PCI_MSI_WINDOW==0x40000000000ULL;
    * .data as an IRQ number.
4. change IRQ allocator to align first IRQ number in a block for MSI.
MSI uses lower bits to specify the vector number so the first IRQ has to
be aligned. MSIX does not need any special allocator though.

Signed-off-by: Alexey Kardashevskiy <address@hidden>
Reviewed-by: Anthony Liguori <address@hidden>
Acked-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 33a0e5d8c555091eef6944595d8787cb9274e451
      
https://github.com/qemu/qemu/commit/33a0e5d8c555091eef6944595d8787cb9274e451
  Author: Alexey Kardashevskiy <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M hw/intc/xics.c

  Log Message:
  -----------
  xics: move registration of global state to realize()

Registration of global state belongs into realize so move it there.

Signed-off-by: Alexey Kardashevskiy <address@hidden>
Reviewed-by: Andreas Färber <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 42561bf2e464a2d682707af1640fc2db1e937c42
      
https://github.com/qemu/qemu/commit/42561bf2e464a2d682707af1640fc2db1e937c42
  Author: Anton Blanchard <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M hw/ppc/spapr.c
    M hw/ppc/spapr_hcall.c
    M include/hw/ppc/spapr.h

  Log Message:
  -----------
  pseries: Add H_SET_MODE hcall to change guest exception endianness

H_SET_MODE is used for controlling various partition settings. One
of these settings is the endianness a guest takes its exceptions in.

Signed-off-by: Anton Blanchard <address@hidden>
[agraf: fix whitespace]
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 7bb438b6a102766ac58e1a2981f8749e4515aa01
      
https://github.com/qemu/qemu/commit/7bb438b6a102766ac58e1a2981f8749e4515aa01
  Author: Alexander Graf <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M target-ppc/kvm_ppc.c

  Log Message:
  -----------
  PPC: KVM: Compile fix for qemu_notify_event

The function qemu_notify_event is defined by a header that we don't
include in the PPC KVM code. Include it to get the code building
again.

  target-ppc/kvm_ppc.c: In function 'kvmppc_timer_hack':
  target-ppc/kvm_ppc.c:26:5: error: implicit declaration of function 
'qemu_notify_event' [-Werror=implicit-function-declaration]
  target-ppc/kvm_ppc.c:26:5: error: nested extern declaration of 
'qemu_notify_event' [-Werror=nested-externs]

Signed-off-by: Alexander Graf <address@hidden>


  Commit: 59760f2dba6b5729bbbef113c0dc142bf9ec94d3
      
https://github.com/qemu/qemu/commit/59760f2dba6b5729bbbef113c0dc142bf9ec94d3
  Author: Alexey Kardashevskiy <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M hw/ppc/spapr_rtas.c

  Log Message:
  -----------
  spapr: add "stop-self" RTAS call required to support hot CPU unplug

PAPR+ requires two RTAS calls to be supported by the hypervisor in
order to allow hotplugging VCPUs from the guest. The "start-cpu" RTAS
call was already there but "stop-self" was not.

This adds the "stop-self" RTAS call.

Signed-off-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 7e472264e9e2727bc7d08fe6f012db76e1c1a193
      
https://github.com/qemu/qemu/commit/7e472264e9e2727bc7d08fe6f012db76e1c1a193
  Author: Alexey Kardashevskiy <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M hw/ppc/spapr_iommu.c
    M trace-events

  Log Message:
  -----------
  PPC: spapr: iommu: rework traces

This converts old style fprintf to traces.

Signed-off-by: Alexey Kardashevskiy <address@hidden>
[agraf: change patch subject]
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 03271524b66dfc979cc0412bdb5d8d617426b644
      
https://github.com/qemu/qemu/commit/03271524b66dfc979cc0412bdb5d8d617426b644
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/aarch64/tcg-target.h
    M tcg/arm/tcg-target.h
    M tcg/hppa/tcg-target.h
    M tcg/i386/tcg-target.h
    M tcg/ia64/tcg-target.h
    M tcg/mips/tcg-target.h
    M tcg/optimize.c
    M tcg/ppc/tcg-target.h
    M tcg/ppc64/tcg-target.h
    M tcg/s390/tcg-target.h
    M tcg/sparc/tcg-target.h
    M tcg/tcg-op.h
    M tcg/tcg-opc.h
    M tcg/tcg.c
    M tcg/tcg.h
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg: Add muluh and mulsh opcodes

Use them in places where mulu2 and muls2 are used.
Optimize mulx2 with dead low part to mulxh.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 3c9a8f17560794ad23889318cc42894c6e592cc3
      
https://github.com/qemu/qemu/commit/3c9a8f17560794ad23889318cc42894c6e592cc3
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/mips/tcg-target.c
    M tcg/mips/tcg-target.h

  Log Message:
  -----------
  tcg-mips: Implement mulsh, muluh

With the optimization in tcg_liveness_analysis,
we can avoid the MFLO when it is unused.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 32f5717f07e5f801e482052311d21a4223fc78f1
      
https://github.com/qemu/qemu/commit/32f5717f07e5f801e482052311d21a4223fc78f1
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c
    M tcg/ppc64/tcg-target.h

  Log Message:
  -----------
  tcg-ppc64: Implement muluh, mulsh

Using these instead of mulu2 and muls2 lets us avoid having to argument
overlap analysis in the backend.  Normal register allocation will DTRT.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 01547f7f9283e416578323e5d5df3327ed4df3ee
      
https://github.com/qemu/qemu/commit/01547f7f9283e416578323e5d5df3327ed4df3ee
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/optimize.c

  Log Message:
  -----------
  tcg: Constant fold div, rem

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 35aa3fb38753bd1557af8370994ce6c5b599e65c
      
https://github.com/qemu/qemu/commit/35aa3fb38753bd1557af8370994ce6c5b599e65c
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M qtest.c

  Log Message:
  -----------
  qtest: Fix FMT_timeval vs time_t

Since FMT_timeval unconditionally uses %ld for both tv_sec and tv_usec,
and already casts tv_usec to long, also cast tv_sec to long.

Cc: Andreas Färber <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: b93949ef6a5dea2b22987f2aa3028068e751a7e4
      
https://github.com/qemu/qemu/commit/b93949ef6a5dea2b22987f2aa3028068e751a7e4
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/aarch64/tcg-target.h
    M tcg/arm/tcg-target.h
    M tcg/hppa/tcg-target.h
    M tcg/i386/tcg-target.h
    M tcg/ia64/tcg-target.h
    M tcg/mips/tcg-target.h
    M tcg/s390/tcg-target.h
    M tcg/sparc/tcg-target.h
    M tcg/tcg.c
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg: Change flush_icache_range arguments to uintptr_t

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 04d5a1da70dfe1a3a5ac5b5a8e7a7b8136d3a985
      
https://github.com/qemu/qemu/commit/04d5a1da70dfe1a3a5ac5b5a8e7a7b8136d3a985
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M cpu-exec.c
    M tcg/ppc/tcg-target.h
    M tcg/tcg.h
    M tcg/tci/tcg-target.h
    M tci.c

  Log Message:
  -----------
  tcg: Change tcg_qemu_tb_exec return to uintptr_t

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 3e9bd63acf145bb2d3da277ee85167878ade53bd
      
https://github.com/qemu/qemu/commit/3e9bd63acf145bb2d3da277ee85167878ade53bd
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M cpu-exec.c

  Log Message:
  -----------
  tcg: Fix next_tb type in cpu_exec

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 78cd7b835e13bee4416782b6ed41e9bef76e3cfc
      
https://github.com/qemu/qemu/commit/78cd7b835e13bee4416782b6ed41e9bef76e3cfc
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/hppa/tcg-target.c
    M tcg/hppa/tcg-target.h
    M tcg/i386/tcg-target.h
    M tcg/sparc/tcg-target.h
    M tcg/tcg.h
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg: Allow TCG_TARGET_REG_BITS to be specified independantly

There are several hosts for which it would be useful to use the
available 64-bit registers in a 32-bit pointer environment.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: d289837eef3550ac156082d812231ec5dfe79501
      
https://github.com/qemu/qemu/commit/d289837eef3550ac156082d812231ec5dfe79501
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/tcg.h

  Log Message:
  -----------
  tcg: Define TCG_TYPE_PTR properly

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 8b73d49f53e1a1d1571ac783ec028ff27befd93e
      
https://github.com/qemu/qemu/commit/8b73d49f53e1a1d1571ac783ec028ff27befd93e
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/tcg.h

  Log Message:
  -----------
  tcg: Define TCG_ptr properly

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: e2c6d1b42d34539120c3cee159dcd9e32cba7d3b
      
https://github.com/qemu/qemu/commit/e2c6d1b42d34539120c3cee159dcd9e32cba7d3b
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/tcg.c
    M tcg/tcg.h

  Log Message:
  -----------
  tcg: Change frame pointer offsets to intptr_t

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 2f2f244d02a2cb28db7ce790576ade08fc3a54bf
      
https://github.com/qemu/qemu/commit/2f2f244d02a2cb28db7ce790576ade08fc3a54bf
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/tcg.c
    M tcg/tcg.h

  Log Message:
  -----------
  tcg: Change memory offsets to intptr_t

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 2ba7fae29ec63acf2ce77d20d4146fa224bf2338
      
https://github.com/qemu/qemu/commit/2ba7fae29ec63acf2ce77d20d4146fa224bf2338
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/aarch64/tcg-target.c
    M tcg/arm/tcg-target.c
    M tcg/hppa/tcg-target.c
    M tcg/i386/tcg-target.c
    M tcg/ia64/tcg-target.c
    M tcg/mips/tcg-target.c
    M tcg/ppc/tcg-target.c
    M tcg/ppc64/tcg-target.c
    M tcg/s390/tcg-target.c
    M tcg/sparc/tcg-target.c
    M tcg/tcg.c
    M tcg/tcg.h
    M tcg/tci/tcg-target.c

  Log Message:
  -----------
  tcg: Change relocation offsets to intptr_t

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 48bc6bab479e5abb542119f3974603afd882c246
      
https://github.com/qemu/qemu/commit/48bc6bab479e5abb542119f3974603afd882c246
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/tcg.c
    M tcg/tcg.h

  Log Message:
  -----------
  tcg: Use uintptr_t in TCGHelperInfo

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 8cfd04959a023f87e1e6727e608a20f168441370
      
https://github.com/qemu/qemu/commit/8cfd04959a023f87e1e6727e608a20f168441370
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M include/exec/gen-icount.h
    M target-alpha/translate.c
    M target-arm/translate.c
    M target-cris/translate.c
    M target-i386/translate.c
    M target-lm32/translate.c
    M target-m68k/translate.c
    M target-microblaze/translate.c
    M target-mips/translate.c
    M target-moxie/translate.c
    M target-openrisc/translate.c
    M target-ppc/translate.c
    M target-s390x/translate.c
    M target-sh4/translate.c
    M target-sparc/translate.c
    M target-unicore32/translate.c
    M target-xtensa/translate.c
    M tcg/tcg-op.h

  Log Message:
  -----------
  tcg: Change tcg_gen_exit_tb argument to uintptr_t

And update all users.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: a05b5b9be0fec96c89e00abaa964be7ce9e661ac
      
https://github.com/qemu/qemu/commit/a05b5b9be0fec96c89e00abaa964be7ce9e661ac
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/aarch64/tcg-target.c
    M tcg/arm/tcg-target.c
    M tcg/hppa/tcg-target.c
    M tcg/i386/tcg-target.c
    M tcg/ia64/tcg-target.c
    M tcg/mips/tcg-target.c
    M tcg/ppc/tcg-target.c
    M tcg/ppc64/tcg-target.c
    M tcg/s390/tcg-target.c
    M tcg/sparc/tcg-target.c
    M tcg/tcg.c
    M tcg/tci/tcg-target.c

  Log Message:
  -----------
  tcg: Change tcg_out_ld/st offset to intptr_t

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: d3452f1f40956e50142d32afbc021c53026a1770
      
https://github.com/qemu/qemu/commit/d3452f1f40956e50142d32afbc021c53026a1770
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Use appropriate types in tcg_reg_alloc_call

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: edee2579ae3722d28756ce04ec665ea9522d8600
      
https://github.com/qemu/qemu/commit/edee2579ae3722d28756ce04ec665ea9522d8600
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Fix jit debug for x32

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 357e3d8a297003f9d79f08e45a79a73eb2d12f5b
      
https://github.com/qemu/qemu/commit/357e3d8a297003f9d79f08e45a79a73eb2d12f5b
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/i386/tcg-target.c

  Log Message:
  -----------
  tcg-i386: Use intptr_t appropriately

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: d5dad3be314dfec80ebb1c69266ae62edfea1850
      
https://github.com/qemu/qemu/commit/d5dad3be314dfec80ebb1c69266ae62edfea1850
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/i386/tcg-target.c

  Log Message:
  -----------
  tcg-i386: Adjust tcg_out_tlb_load for x32

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: c72b26ec92eb93a92852ab1d23acb5a945de5062
      
https://github.com/qemu/qemu/commit/c72b26ec92eb93a92852ab1d23acb5a945de5062
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M configure

  Log Message:
  -----------
  configure: Allow x32 as a host

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 0f842f8a246f2b5b51a11c13f933bf7a90ae8e96
      
https://github.com/qemu/qemu/commit/0f842f8a246f2b5b51a11c13f933bf7a90ae8e96
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M include/exec/exec-all.h
    M include/exec/softmmu_template.h

  Log Message:
  -----------
  exec: Reorganize the GETRA/GETPC macros

Always define GETRA; use __builtin_extract_return_addr, rather than
having a special case for s390.  Split GETPC_ADJ out of GETPC; use 2
universally, rather than having a special case for arm.

Rename GETPC_LDST to GETRA_LDST to indicate that it does not
contain the GETPC_ADJ value.  Likewise with GETPC_EXT to GETRA_EXT.

Perform the GETPC_ADJ adjustment inside helper_ret_ld/st.  This will
allow backends to pass along the "true" return address rather than
the massaged GETPC value.  In the meantime, double application of
GETPC_ADJ does not hurt, since the call insn in all ISAs is at least
4 bytes long.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 5bcebc253c1637d3a5b957abc7460c49a670c4de
      
https://github.com/qemu/qemu/commit/5bcebc253c1637d3a5b957abc7460c49a670c4de
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/i386/tcg-target.c

  Log Message:
  -----------
  tcg-i386: Don't perform GETPC adjustment in TCG code

Since we now perform it inside the helper, no need to do it here.
This also lets us perform a tail-call from the store slow path to
the helper.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 701e3a5cc02fd52ba59894781e78d433ec043772
      
https://github.com/qemu/qemu/commit/701e3a5cc02fd52ba59894781e78d433ec043772
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M include/exec/softmmu_template.h

  Log Message:
  -----------
  exec: Rename USUFFIX to LSUFFIX

In a following patch, there will be confusion between multiple "unsigned"
suffixes; rename this one so as to imply "load".

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: b1669e5e321a0a96a07ec1f7a82ce8f4b25ddfd5
      
https://github.com/qemu/qemu/commit/b1669e5e321a0a96a07ec1f7a82ce8f4b25ddfd5
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M target-lm32/op_helper.c
    M target-moxie/helper.c
    M target-ppc/mmu_helper.c
    M target-unicore32/op_helper.c
    M target-xtensa/op_helper.c

  Log Message:
  -----------
  target: Include softmmu_exec.h where forgotten

Several targets forgot to include softmmu_exec.h, which would
break them with a header cleanup to follow.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: e58eb534133f8ccaa957a33a06ccdb9129f2c842
      
https://github.com/qemu/qemu/commit/e58eb534133f8ccaa957a33a06ccdb9129f2c842
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M include/exec/exec-all.h
    R include/exec/softmmu_defs.h
    M include/exec/softmmu_exec.h
    M tcg/aarch64/tcg-target.c
    M tcg/arm/tcg-target.c
    M tcg/hppa/tcg-target.c
    M tcg/i386/tcg-target.c
    M tcg/ia64/tcg-target.c
    M tcg/mips/tcg-target.c
    M tcg/ppc/tcg-target.c
    M tcg/ppc64/tcg-target.c
    M tcg/s390/tcg-target.c
    M tcg/sparc/tcg-target.c
    M tcg/tcg.h

  Log Message:
  -----------
  exec: Split softmmu_defs.h

The _cmmu helpers can be moved to exec-all.h.  The helpers that are
used from TCG will shortly need access to tcg_target_long so move
their declarations into tcg.h.

This requires minor include adjustments to all TCG backends.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: c8f94df5934afd9b2011773aaee0fdef714ff573
      
https://github.com/qemu/qemu/commit/c8f94df5934afd9b2011773aaee0fdef714ff573
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M include/exec/softmmu_template.h
    M tcg/i386/tcg-target.c
    M tcg/tcg.h

  Log Message:
  -----------
  tcg: Introduce zero and sign-extended versions of load helpers

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 6fb5874590589585cdcad4ca2431d9d8d4d491b1
      
https://github.com/qemu/qemu/commit/6fb5874590589585cdcad4ca2431d9d8d4d491b1
  Author: Richard Henderson <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/i386/tcg-target.c

  Log Message:
  -----------
  tcg-i386: Make use of zero-extended memory helper routines

For 8 and 16-bit unsigned loads, rely on the zero-extension
from the helper and use a smaller 32-bit move insn.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 988902fc3bc599f7431461b790f3d63d3a2357f9
      
https://github.com/qemu/qemu/commit/988902fc3bc599f7431461b790f3d63d3a2357f9
  Author: Aurelien Jarno <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/mips/tcg-target.c
    M tcg/mips/tcg-target.h

  Log Message:
  -----------
  tcg/mips: detect available host instructions at runtime

Now that TCG supports enabling and disabling ops at runtime, it's
possible to detect the available host instructions at runtime, and
enable the corresponding ops accordingly.

Unfortunately it's not easy to probe for available instructions on
MIPS, the information is partially available in /proc/cpuinfo, and
not available in AUXV. This patch therefore probes for the instructions
by trying to execute them and by catching a possible SIGILL signal.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: df81ff51d50b22c52e609e13d5292d09e4634659
      
https://github.com/qemu/qemu/commit/df81ff51d50b22c52e609e13d5292d09e4634659
  Author: Aurelien Jarno <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/mips/tcg-target.c

  Log Message:
  -----------
  tcg/mips: inline bswap16/bswap32 ops

Use an inline version for the bswap16 and bswap32 ops to avoid
testing for MIPS32R2 instructions availability, as these ops are
only available in that case.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 3207bf2549a1a84c577d2f6a481192566a059163
      
https://github.com/qemu/qemu/commit/3207bf2549a1a84c577d2f6a481192566a059163
  Author: Aurelien Jarno <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M tcg/mips/tcg-target.c
    M tcg/mips/tcg-target.h

  Log Message:
  -----------
  tcg/mips: only enable ext8s/ext16s ops on MIPS32R2

On MIPS ext8s and ext16s ops are implemented with a dedicated
instruction only on MIPS32R2, otherwise the same kind of implementation
than at TCG level (shift left followed by shift right) is used.

Change that by only implementing the ext8s and ext16s ops on MIPS32R2 so
that optimizations can be done by the optimizer. Use an inline version to
avoid having to test again for MIPS32R2 instructions. Keep the shift
implementation for the ld/st routines.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 32f3bd6d4d6d6f835cbc2b9241fe8c32d2898d73
      
https://github.com/qemu/qemu/commit/32f3bd6d4d6d6f835cbc2b9241fe8c32d2898d73
  Author: Aurelien Jarno <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M disas/ppc.c
    M hw/char/spapr_vty.c
    M hw/intc/xics.c
    M hw/ppc/e500.c
    M hw/ppc/ppc405_boards.c
    M hw/ppc/ppc405_uc.c
    M hw/ppc/spapr.c
    M hw/ppc/spapr_hcall.c
    M hw/ppc/spapr_iommu.c
    M hw/ppc/spapr_pci.c
    M hw/ppc/spapr_rtas.c
    M hw/ppc/virtex_ml507.c
    M include/hw/pci-host/spapr.h
    M include/hw/ppc/spapr.h
    M target-ppc/cpu.h
    M target-ppc/excp_helper.c
    M target-ppc/kvm_ppc.c
    M target-ppc/mmu_helper.c
    M target-ppc/translate.c
    M target-ppc/translate_init.c
    M trace-events

  Log Message:
  -----------
  Merge branch 'ppc-for-upstream' of git://github.com/agraf/qemu

* 'ppc-for-upstream' of git://github.com/agraf/qemu:
  PPC: spapr: iommu: rework traces
  spapr: add "stop-self" RTAS call required to support hot CPU unplug
  PPC: KVM: Compile fix for qemu_notify_event
  pseries: Add H_SET_MODE hcall to change guest exception endianness
  xics: move registration of global state to realize()
  spapr-pci: rework MSI/MSIX
  target-ppc: Use #define instead of opencoding SLB valid bit
  spapr-pci: fix config space access to support bridges
  target-ppc: fix bit extraction for FPBF and FPL
  ppc405_boards: Don't enforce presence of firmware for qtest
  ppc405_uc: Disable debug output
  ppc405_boards: Disable debug output
  ppc: virtex_ml507: QEMU_OPTION_dtb support for this machine.
  disas/ppc.c: Fix little endian disassembly
  target-ppc: POWER7 supports the MSR_LE bit
  target-ppc: USE LPCR_ILE to control exception endian on POWER7
  pseries: Fix stalls on hypervisor virtual console
  PPC: E500: Generate device tree on reset


  Commit: 545825d4cda03ea292b7788b3401b99860efe8bc
      
https://github.com/qemu/qemu/commit/545825d4cda03ea292b7788b3401b99860efe8bc
  Author: Aurelien Jarno <address@hidden>
  Date:   2013-09-02 (Mon, 02 Sep 2013)

  Changed paths:
    M configure
    M cpu-exec.c
    M include/exec/exec-all.h
    M include/exec/gen-icount.h
    R include/exec/softmmu_defs.h
    M include/exec/softmmu_exec.h
    M include/exec/softmmu_template.h
    M qtest.c
    M target-alpha/translate.c
    M target-arm/translate.c
    M target-cris/translate.c
    M target-i386/translate.c
    M target-lm32/op_helper.c
    M target-lm32/translate.c
    M target-m68k/translate.c
    M target-microblaze/translate.c
    M target-mips/translate.c
    M target-moxie/helper.c
    M target-moxie/translate.c
    M target-openrisc/translate.c
    M target-ppc/mmu_helper.c
    M target-ppc/translate.c
    M target-s390x/translate.c
    M target-sh4/translate.c
    M target-sparc/translate.c
    M target-unicore32/op_helper.c
    M target-unicore32/translate.c
    M target-xtensa/op_helper.c
    M target-xtensa/translate.c
    M tcg/aarch64/tcg-target.c
    M tcg/aarch64/tcg-target.h
    M tcg/arm/tcg-target.c
    M tcg/arm/tcg-target.h
    M tcg/hppa/tcg-target.c
    M tcg/hppa/tcg-target.h
    M tcg/i386/tcg-target.c
    M tcg/i386/tcg-target.h
    M tcg/ia64/tcg-target.c
    M tcg/ia64/tcg-target.h
    M tcg/mips/tcg-target.c
    M tcg/mips/tcg-target.h
    M tcg/optimize.c
    M tcg/ppc/tcg-target.c
    M tcg/ppc/tcg-target.h
    M tcg/ppc64/tcg-target.c
    M tcg/ppc64/tcg-target.h
    M tcg/s390/tcg-target.c
    M tcg/s390/tcg-target.h
    M tcg/sparc/tcg-target.c
    M tcg/sparc/tcg-target.h
    M tcg/tcg-op.h
    M tcg/tcg-opc.h
    M tcg/tcg.c
    M tcg/tcg.h
    M tcg/tci/tcg-target.c
    M tcg/tci/tcg-target.h
    M tci.c

  Log Message:
  -----------
  Merge branch 'tcg-next' of git://github.com/rth7680/qemu

* 'tcg-next' of git://github.com/rth7680/qemu: (29 commits)
  tcg-i386: Make use of zero-extended memory helper routines
  tcg: Introduce zero and sign-extended versions of load helpers
  exec: Split softmmu_defs.h
  target: Include softmmu_exec.h where forgotten
  exec: Rename USUFFIX to LSUFFIX
  tcg-i386: Don't perform GETPC adjustment in TCG code
  exec: Reorganize the GETRA/GETPC macros
  configure: Allow x32 as a host
  tcg-i386: Adjust tcg_out_tlb_load for x32
  tcg-i386: Use intptr_t appropriately
  tcg: Fix jit debug for x32
  tcg: Use appropriate types in tcg_reg_alloc_call
  tcg: Change tcg_out_ld/st offset to intptr_t
  tcg: Change tcg_gen_exit_tb argument to uintptr_t
  tcg: Use uintptr_t in TCGHelperInfo
  tcg: Change relocation offsets to intptr_t
  tcg: Change memory offsets to intptr_t
  tcg: Change frame pointer offsets to intptr_t
  tcg: Define TCG_ptr properly
  tcg: Define TCG_TYPE_PTR properly
  ...


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