[Qemu-commits] [qemu/qemu] dfdcf3: linux-user: Add support for big-endian aarch64

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: dfdcf34031db02eb8d81dd3b1c3415ec900c40bb
      
https://github.com/qemu/qemu/commit/dfdcf34031db02eb8d81dd3b1c3415ec900c40bb
  Author: Michael Weiser <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M linux-user/main.c

  Log Message:
  -----------
  linux-user: Add support for big-endian aarch64

Enable big-endian mode for data accesses on aarch64 for big-endian linux
user mode. Activate it for all exception levels as documented by ARM:
Set the SCTLR EE bit for ELs 1 through 3. Additionally set bit E0E in
EL1 to enable it in EL0 as well.

Signed-off-by: Michael Weiser <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: cb3aa5fea19cdc108baf6c3aff2e768bf9475b50
      
https://github.com/qemu/qemu/commit/cb3aa5fea19cdc108baf6c3aff2e768bf9475b50
  Author: Michael Weiser <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M linux-user/aarch64/target_syscall.h

  Log Message:
  -----------
  linux-user: Add separate aarch64_be uname

Make big-endian aarch64 systems identify as aarch64_be as expected by
big-endian userland and toolchains.

Signed-off-by: Michael Weiser <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Laurent Vivier <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 50f22fa60d95c04a179e2cbf4b5f58d1f6068b61
      
https://github.com/qemu/qemu/commit/50f22fa60d95c04a179e2cbf4b5f58d1f6068b61
  Author: Michael Weiser <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M linux-user/signal.c

  Log Message:
  -----------
  linux-user: Fix endianess of aarch64 signal trampoline

Since for aarch64 the signal trampoline is synthesized directly into the
signal frame we need to make sure the instructions end up little-endian.
Otherwise the wrong endianness will cause a SIGILL upon return from the
signal handler on big-endian targets.

Signed-off-by: Michael Weiser <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 722dd7be8c5a9bc73e0a19be1418046ed043ce0b
      
https://github.com/qemu/qemu/commit/722dd7be8c5a9bc73e0a19be1418046ed043ce0b
  Author: Michael Weiser <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M configure
    A default-configs/aarch64_be-linux-user.mak

  Log Message:
  -----------
  configure: Add aarch64_be-linux-user target

Add target aarch64_be-linux-user. This allows a qemu-aarch64_be binary
to be built that will run big-endian aarch64 binaries.

Signed-off-by: Michael Weiser <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Laurent Vivier <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: f772f212b39a79b4510b0e9b403714cc03dae9b9
      
https://github.com/qemu/qemu/commit/f772f212b39a79b4510b0e9b403714cc03dae9b9
  Author: Michael Weiser <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M scripts/qemu-binfmt-conf.sh

  Log Message:
  -----------
  linux-user: Add aarch64_be magic numbers to qemu-binfmt-conf.sh

As we now have a linux-user aarch64_be target, we can add it to the list
of supported targets in qemu-binfmt-conf.sh

Signed-off-by: Michael Weiser <address@hidden>
Reviewed-by: Laurent Vivier <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 2ced93eee04ac636387233c64720d0f764d8d24d
      
https://github.com/qemu/qemu/commit/2ced93eee04ac636387233c64720d0f764d8d24d
  Author: Michael Weiser <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M scripts/qemu-binfmt-conf.sh

  Log Message:
  -----------
  linux-user: Separate binfmt arm CPU families

Give big-endian arm and aarch64 CPUs their own family in
qemu-binfmt-conf.sh to make sure we register qemu-user for binaries of
the opposite endianness on arm and aarch64. Apart from the family
assignments of the magic values, qemu_get_family() needs to be able to
distinguish the two and recognise aarch64{,_be} as well.

Signed-off-by: Michael Weiser <address@hidden>
Reviewed-by: Laurent Vivier <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: bfe69cc867dfef4b8af348f1f7e36b2727283c4c
      
https://github.com/qemu/qemu/commit/bfe69cc867dfef4b8af348f1f7e36b2727283c4c
  Author: Michael Weiser <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M scripts/qemu-binfmt-conf.sh

  Log Message:
  -----------
  linux-user: Activate armeb handler registration

armeb is missing from the target list in qemu-binfmt-conf.sh. Add it so
the handler for those binaries gets registered by the script.

Signed-off-by: Michael Weiser <address@hidden>
Reviewed-by: Laurent Vivier <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 0785557f8811133bd69be02aeccf018d47a26373
      
https://github.com/qemu/qemu/commit/0785557f8811133bd69be02aeccf018d47a26373
  Author: Michael Weiser <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M target/arm/helper-a64.c

  Log Message:
  -----------
  target/arm: Fix stlxp for aarch64_be

ldxp loads two consecutive doublewords from memory regardless of CPU
endianness. On store, stlxp currently assumes to work with a 128bit
value and consequently switches order in big-endian mode. With this
change it packs the doublewords in reverse order in anticipation of the
128bit big-endian store operation interposing them so they end up in
memory in the right order. This makes it work for both MTTCG and !MTTCG.
It effectively implements the ARM ARM STLXP operation pseudo-code:

data = if BigEndian() then el1:el2 else el2:el1;

With this change an aarch64_be Linux 4.14.4 kernel succeeds to boot up
in system emulation mode.

Signed-off-by: Michael Weiser <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 4d027afeb3a9781bf15ad30d43d07a02c2b08c73
      
https://github.com/qemu/qemu/commit/4d027afeb3a9781bf15ad30d43d07a02c2b08c73
  Author: Zhaoshenglong <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M hw/arm/virt-acpi-build.c

  Log Message:
  -----------
  Virt: ACPI: fix qemu assert due to re-assigned table data address

acpi_data_push uses g_array_set_size to resize the memory size. If there
is no enough contiguous memory, the address will be changed. If we use
the old value, it will assert.
qemu-kvm: hw/acpi/bios-linker-loader.c:214: bios_linker_loader_add_checksum:
Assertion `start_offset < file->blob->len' failed.`

This issue only happens in building SRAT table now but here we unify the
pattern for other tables as well to avoid possible issues in the future.

Signed-off-by: Zhaoshenglong <address@hidden>
Reviewed-by: Andrew Jones <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 1fdde6537ecec4a6b416bc232c868b64d645cc62
      
https://github.com/qemu/qemu/commit/1fdde6537ecec4a6b416bc232c868b64d645cc62
  Author: Andrey Smirnov <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M hw/arm/fsl-imx6.c
    M hw/net/imx_fec.c

  Log Message:
  -----------
  imx_fec: Do not link to netdev

Binding to a particular netdev doesn't seem to belong to this layer
and should probably be done as a part of board or SoC specific code.

Convert all of the users of this IP block to use
qdev_set_nic_properties() instead.

Cc: Peter Maydell <address@hidden>
Cc: Jason Wang <address@hidden>
Cc: Philippe Mathieu-Daudé <address@hidden>
Cc: address@hidden
Cc: address@hidden
Cc: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Andrey Smirnov <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: a6383e99ffc3b615d8465aebbd5d48f1fa9b2949
      
https://github.com/qemu/qemu/commit/a6383e99ffc3b615d8465aebbd5d48f1fa9b2949
  Author: Andrey Smirnov <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M hw/net/imx_fec.c

  Log Message:
  -----------
  imx_fec: Refactor imx_eth_enable_rx()

Refactor imx_eth_enable_rx() to have more meaningfull variable name
than 'tmp' and to reduce number of logical negations done.

Cc: Peter Maydell <address@hidden>
Cc: Jason Wang <address@hidden>
Cc: Philippe Mathieu-Daudé <address@hidden>
Cc: address@hidden
Cc: address@hidden
Cc: address@hidden
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Andrey Smirnov <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: b2b012afdd9c03ba8a1619f45301d34f358d367b
      
https://github.com/qemu/qemu/commit/b2b012afdd9c03ba8a1619f45301d34f358d367b
  Author: Andrey Smirnov <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M hw/net/imx_fec.c

  Log Message:
  -----------
  imx_fec: Change queue flushing heuristics

In current implementation, packet queue flushing logic seem to suffer
from a deadlock like scenario if a packet is received by the interface
before before Rx ring is initialized by Guest's driver. Consider the
following sequence of events:

        1. A QEMU instance is started against a TAP device on Linux
           host, running Linux guest, e. g., something to the effect
           of:

           qemu-system-arm \
              -net nic,model=imx.fec,netdev=lan0 \
              netdev tap,id=lan0,ifname=tap0,script=no,downscript=no \
              ... rest of the arguments ...

        2. Once QEMU starts, but before guest reaches the point where
           FEC deriver is done initializing the HW, Guest, via TAP
           interface, receives a number of multicast MDNS packets from
           Host (not necessarily true for every OS, but it happens at
           least on Fedora 25)

        3. Recieving a packet in such a state results in
           imx_eth_can_receive() returning '0', which in turn causes
           tap_send() to disable corresponding event (tap.c:203)

        4. Once Guest's driver reaches the point where it is ready to
           recieve packets it prepares Rx ring descriptors and writes
           ENET_RDAR_RDAR to ENET_RDAR register to indicate to HW that
           more descriptors are ready. And at this points emulation
           layer does this:

                 s->regs[index] = ENET_RDAR_RDAR;
           imx_eth_enable_rx(s);

           which, combined with:
  if (!s->regs[ENET_RDAR]) {
                     qemu_flush_queued_packets(qemu_get_queue(s->nic));
                  }

           results in Rx queue never being flushed and corresponding
           I/O event beign disabled.

To prevent the problem, change the code to always flush packet queue
when ENET_RDAR transitions 0 -> ENET_RDAR_RDAR.

Cc: Peter Maydell <address@hidden>
Cc: Jason Wang <address@hidden>
Cc: Philippe Mathieu-Daudé <address@hidden>
Cc: address@hidden
Cc: address@hidden
Cc: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Andrey Smirnov <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 7bac20dc5111963083686743dee00e0ae4fd976b
      
https://github.com/qemu/qemu/commit/7bac20dc5111963083686743dee00e0ae4fd976b
  Author: Andrey Smirnov <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M hw/net/imx_fec.c
    M include/hw/net/imx_fec.h

  Log Message:
  -----------
  imx_fec: Move Tx frame buffer away from the stack

Make Tx frame assembly buffer to be a paort of IMXFECState structure
to avoid a concern about having large data buffer on the stack.

Cc: Peter Maydell <address@hidden>
Cc: Jason Wang <address@hidden>
Cc: Philippe Mathieu-Daudé <address@hidden>
Cc: address@hidden
Cc: address@hidden
Cc: address@hidden
Signed-off-by: Andrey Smirnov <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ff9a7feeab59323d70a9377e9196f042b0647d66
      
https://github.com/qemu/qemu/commit/ff9a7feeab59323d70a9377e9196f042b0647d66
  Author: Andrey Smirnov <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M hw/net/imx_fec.c
    M include/hw/net/imx_fec.h

  Log Message:
  -----------
  imx_fec: Use ENET_FTRL to determine truncation length

Frame truncation length, TRUNC_FL, is determined by the contents of
ENET_FTRL register, so convert the code to use it instead of a
hardcoded constant.

To avoid the case where TRUNC_FL is greater that ENET_MAX_FRAME_SIZE,
increase the value of the latter to its theoretical maximum of 16K.

Cc: Peter Maydell <address@hidden>
Cc: Jason Wang <address@hidden>
Cc: Philippe Mathieu-Daudé <address@hidden>
Cc: address@hidden
Cc: address@hidden
Cc: address@hidden
Signed-off-by: Andrey Smirnov <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 4c5e7a6cdae78ed823042375824ced09cccefbdb
      
https://github.com/qemu/qemu/commit/4c5e7a6cdae78ed823042375824ced09cccefbdb
  Author: Andrey Smirnov <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M hw/net/imx_fec.c

  Log Message:
  -----------
  imx_fec: Use MIN instead of explicit ternary operator

Cc: Peter Maydell <address@hidden>
Cc: Jason Wang <address@hidden>
Cc: Philippe Mathieu-Daudé <address@hidden>
Cc: address@hidden
Cc: address@hidden
Cc: address@hidden
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Andrey Smirnov <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ebdd8cddb9e657ef75024b4cc9057dd4ce397a55
      
https://github.com/qemu/qemu/commit/ebdd8cddb9e657ef75024b4cc9057dd4ce397a55
  Author: Andrey Smirnov <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M hw/net/imx_fec.c
    M include/hw/net/imx_fec.h

  Log Message:
  -----------
  imx_fec: Emulate SHIFT16 in ENETx_RACC

Needed to support latest Linux kernel driver which relies on that
functionality.

Cc: Peter Maydell <address@hidden>
Cc: Jason Wang <address@hidden>
Cc: Philippe Mathieu-Daudé <address@hidden>
Cc: address@hidden
Cc: address@hidden
Cc: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Andrey Smirnov <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: f93f961c40a31228e3f66e66d99a68937aa242c5
      
https://github.com/qemu/qemu/commit/f93f961c40a31228e3f66e66d99a68937aa242c5
  Author: Andrey Smirnov <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M hw/net/imx_fec.c
    M include/hw/net/imx_fec.h

  Log Message:
  -----------
  imx_fec: Add support for multiple Tx DMA rings

More recent version of the IP block support more than one Tx DMA ring,
so add the code implementing that feature.

Cc: Peter Maydell <address@hidden>
Cc: Jason Wang <address@hidden>
Cc: Philippe Mathieu-Daudé <address@hidden>
Cc: address@hidden
Cc: address@hidden
Cc: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Andrey Smirnov <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 52cfd5846b8979805077ce7608aa36c18a2a9f32
      
https://github.com/qemu/qemu/commit/52cfd5846b8979805077ce7608aa36c18a2a9f32
  Author: Andrey Smirnov <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M hw/net/imx_fec.c

  Log Message:
  -----------
  imx_fec: Use correct length for packet size

Use 'frame_size' instead of 'len' when calling qemu_send_packet(),
failing to do so results in malformed packets send in case when that
packed is fragmented into multiple DMA transactions.

Cc: Peter Maydell <address@hidden>
Cc: Jason Wang <address@hidden>
Cc: Philippe Mathieu-Daudé <address@hidden>
Cc: address@hidden
Cc: address@hidden
Cc: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Andrey Smirnov <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 894d74cc4f2fa577765bae711b9dc9ac9309521e
      
https://github.com/qemu/qemu/commit/894d74cc4f2fa577765bae711b9dc9ac9309521e
  Author: Andrey Smirnov <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M hw/net/imx_fec.c

  Log Message:
  -----------
  imx_fec: Fix a typo in imx_enet_receive()

Cc: Peter Maydell <address@hidden>
Cc: Jason Wang <address@hidden>
Cc: Philippe Mathieu-Daudé <address@hidden>
Cc: address@hidden
Cc: address@hidden
Cc: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Andrey Smirnov <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 831858ad9da7eccf4c260c60ed56cff0f1666424
      
https://github.com/qemu/qemu/commit/831858ad9da7eccf4c260c60ed56cff0f1666424
  Author: Andrey Smirnov <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M hw/net/imx_fec.c
    M include/hw/arm/fsl-imx25.h
    M include/hw/net/imx_fec.h

  Log Message:
  -----------
  imx_fec: Reserve full FSL_IMX25_FEC_SIZE page for the register file

Some i.MX SoCs (e.g. i.MX7) have FEC registers going as far as offset
0x614, so to avoid getting aborts when accessing those on QEMU, extend
the register file to cover FSL_IMX25_FEC_SIZE(16K) of address space
instead of just 1K.

Cc: Peter Maydell <address@hidden>
Cc: Jason Wang <address@hidden>
Cc: Philippe Mathieu-Daudé <address@hidden>
Cc: address@hidden
Cc: address@hidden
Cc: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Andrey Smirnov <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 2ba63e4af69b674f4fabd317dd438061de1ea310
      
https://github.com/qemu/qemu/commit/2ba63e4af69b674f4fabd317dd438061de1ea310
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M hw/timer/pxa2xx_timer.c

  Log Message:
  -----------
  hw/timer/pxa2xx_timer: replace hw_error() -> qemu_log_mask()

Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 487b406af1164dc036c70126f53a20c4c395db92
      
https://github.com/qemu/qemu/commit/487b406af1164dc036c70126f53a20c4c395db92
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M hw/sd/pxa2xx_mmci.c
    M hw/sd/trace-events

  Log Message:
  -----------
  hw/sd/pxa2xx_mmci: add read/write() trace events

Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden
[PMM: add missing include]
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 579648554acbd6c22d5cc2f03cf77cfc25332650
      
https://github.com/qemu/qemu/commit/579648554acbd6c22d5cc2f03cf77cfc25332650
  Author: Peter Maydell <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M linux-user/arm/nwfpe/fpa11.c

  Log Message:
  -----------
  linux-user/arm/nwfpe: Check coprocessor number for FPA emulation

Our copy of the nwfpe code for emulating of the old FPA11 floating
point unit doesn't check the coprocessor number in the instruction
when it emulates it.  This means that we might treat some
instructions which should really UNDEF as being FPA11 instructions by
accident.

The kernel's copy of the nwfpe code doesn't make this error; I suspect
the bug was noticed and fixed as part of the process of mainlining
the nwfpe code more than a decade ago.

Add a check that the coprocessor number (which is always in bits
[11:8] of the instruction) is either 1 or 2, which is where the
FPA11 lives.

Reported-by: Richard Henderson <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 2eea841c11096e8dcc457b80e21f3fbdc32d2590
      
https://github.com/qemu/qemu/commit/2eea841c11096e8dcc457b80e21f3fbdc32d2590
  Author: Peter Maydell <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Make disas_thumb2_insn() generate its own UNDEF exceptions

Refactor disas_thumb2_insn() so that it generates the code for raising
an UNDEF exception for invalid insns, rather than returning a flag
which the caller must check to see if it needs to generate the UNDEF
code. This brings the function in to line with the behaviour of
disas_thumb_insn() and disas_arm_insn().

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden


  Commit: f1945632b43e36bd9f3e0c2feb0e5b152be7ed91
      
https://github.com/qemu/qemu/commit/f1945632b43e36bd9f3e0c2feb0e5b152be7ed91
  Author: Peter Maydell <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M hw/intc/arm_gicv3_dist.c
    M hw/intc/arm_gicv3_its_common.c
    M hw/intc/arm_gicv3_redist.c

  Log Message:
  -----------
  hw/intc/arm_gicv3: Make reserved register addresses RAZ/WI

The GICv3 specification says that reserved register addresses
should RAZ/WI. This means we need to return MEMTX_OK, not MEMTX_ERROR,
because now that we support generating external aborts the
latter will cause an abort on new board models.

Cc: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Reviewed-by: Alistair Francis <address@hidden>


  Commit: 0cf09852015e47a5fbb974ff7ac320366afd21ee
      
https://github.com/qemu/qemu/commit/0cf09852015e47a5fbb974ff7ac320366afd21ee
  Author: Peter Maydell <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M hw/intc/arm_gic.c

  Log Message:
  -----------
  hw/intc/arm_gic: reserved register addresses are RAZ/WI

The GICv2 specification says that reserved register addresses
must RAZ/WI; now that we implement external abort handling
for Arm CPUs this means we must return MEMTX_OK rather than
MEMTX_ERROR, to avoid generating a spurious guest data abort.

Cc: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Reviewed-by: Alistair Francis <address@hidden>


  Commit: 997eba28a3ed5400a80f754bf3a1c8044b75b9ff
      
https://github.com/qemu/qemu/commit/997eba28a3ed5400a80f754bf3a1c8044b75b9ff
  Author: Peter Maydell <address@hidden>
  Date:   2018-01-11 (Thu, 11 Jan 2018)

  Changed paths:
    M configure
    A default-configs/aarch64_be-linux-user.mak
    M hw/arm/fsl-imx6.c
    M hw/arm/virt-acpi-build.c
    M hw/intc/arm_gic.c
    M hw/intc/arm_gicv3_dist.c
    M hw/intc/arm_gicv3_its_common.c
    M hw/intc/arm_gicv3_redist.c
    M hw/net/imx_fec.c
    M hw/sd/pxa2xx_mmci.c
    M hw/sd/trace-events
    M hw/timer/pxa2xx_timer.c
    M include/hw/arm/fsl-imx25.h
    M include/hw/net/imx_fec.h
    M linux-user/aarch64/target_syscall.h
    M linux-user/arm/nwfpe/fpa11.c
    M linux-user/main.c
    M linux-user/signal.c
    M scripts/qemu-binfmt-conf.sh
    M target/arm/helper-a64.c
    M target/arm/translate.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180111' 
into staging

target-arm queue:
 * add aarch64_be linux-user target
 * Virt: ACPI: fix qemu assert due to re-assigned table data address
 * imx_fec: various bug fixes and cleanups
 * hw/timer/pxa2xx_timer: replace hw_error() -> qemu_log_mask()
 * hw/sd/pxa2xx_mmci: add read/write() trace events
 * linux-user/arm/nwfpe: Check coprocessor number for FPA emulation
 * target/arm: Make disas_thumb2_insn() generate its own UNDEF exceptions
 * hw/intc/arm_gicv3: Make reserved register addresses RAZ/WI
 * hw/intc/arm_gic: reserved register addresses are RAZ/WI

# gpg: Signature made Thu 11 Jan 2018 13:37:25 GMT
# gpg:                using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <address@hidden>"
# gpg:                 aka "Peter Maydell <address@hidden>"
# gpg:                 aka "Peter Maydell <address@hidden>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20180111: (26 commits)
  hw/intc/arm_gic: reserved register addresses are RAZ/WI
  hw/intc/arm_gicv3: Make reserved register addresses RAZ/WI
  target/arm: Make disas_thumb2_insn() generate its own UNDEF exceptions
  linux-user/arm/nwfpe: Check coprocessor number for FPA emulation
  hw/sd/pxa2xx_mmci: add read/write() trace events
  hw/timer/pxa2xx_timer: replace hw_error() -> qemu_log_mask()
  imx_fec: Reserve full FSL_IMX25_FEC_SIZE page for the register file
  imx_fec: Fix a typo in imx_enet_receive()
  imx_fec: Use correct length for packet size
  imx_fec: Add support for multiple Tx DMA rings
  imx_fec: Emulate SHIFT16 in ENETx_RACC
  imx_fec: Use MIN instead of explicit ternary operator
  imx_fec: Use ENET_FTRL to determine truncation length
  imx_fec: Move Tx frame buffer away from the stack
  imx_fec: Change queue flushing heuristics
  imx_fec: Refactor imx_eth_enable_rx()
  imx_fec: Do not link to netdev
  Virt: ACPI: fix qemu assert due to re-assigned table data address
  target/arm: Fix stlxp for aarch64_be
  linux-user: Activate armeb handler registration
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/e890966d6086...997eba28a3ed