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[Qemu-commits] [qemu/qemu] 6d0589: loongarch: mark loongarch_ipi_iocsr r
From: |
Richard Henderson |
Subject: |
[Qemu-commits] [qemu/qemu] 6d0589: loongarch: mark loongarch_ipi_iocsr re-entrnacy safe |
Date: |
Mon, 15 May 2023 06:56:29 -0700 |
Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: 6d0589e0e6c64b888864a2bf980537be20389264
https://github.com/qemu/qemu/commit/6d0589e0e6c64b888864a2bf980537be20389264
Author: Alexander Bulekov <alxndr@bu.edu>
Date: 2023-05-15 (Mon, 15 May 2023)
Changed paths:
M hw/intc/loongarch_ipi.c
Log Message:
-----------
loongarch: mark loongarch_ipi_iocsr re-entrnacy safe
loongarch_ipi_iocsr MRs rely on re-entrant IO through the ipi_send
function. As such, mark these MRs re-entrancy-safe.
Fixes: a2e1753b80 ("memory: prevent dma-reentracy issues")
Signed-off-by: Alexander Bulekov <alxndr@bu.edu>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230506112145.3563708-1-alxndr@bu.edu>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Commit: 7318c62215ac1cf6b4d3c10b267e4cbc37a21f5a
https://github.com/qemu/qemu/commit/7318c62215ac1cf6b4d3c10b267e4cbc37a21f5a
Author: Song Gao <gaosong@loongson.cn>
Date: 2023-05-15 (Mon, 15 May 2023)
Changed paths:
M MAINTAINERS
A tests/avocado/machine_loongarch.py
Log Message:
-----------
tests/avocado: Add LoongArch machine start test
Add a new test in tests/avocado to check LoongArch virt machine start.
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Message-Id: <20230513012744.1885728-1-gaosong@loongson.cn>
Commit: 78464f023b5407c636239de43cef864d76098009
https://github.com/qemu/qemu/commit/78464f023b5407c636239de43cef864d76098009
Author: Song Gao <gaosong@loongson.cn>
Date: 2023-05-15 (Mon, 15 May 2023)
Changed paths:
M hw/intc/loongarch_ipi.c
M hw/loongarch/virt.c
M include/hw/intc/loongarch_ipi.h
M include/hw/loongarch/virt.h
Log Message:
-----------
hw/loongarch/virt: Modify ipi as percpu device
ipi is used to communicate between cpus, this patch modified
loongarch ipi device as percpu device, so that there are
2 MemoryRegions with ipi device, rather than 2*cpus
MemoryRegions, which may be large than QDEV_MAX_MMIO if
more cpus are added on loongarch virt machine.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230512100421.1867848-2-gaosong@loongson.cn>
Commit: 646c39b220f789158313fee5d207f370e29c586a
https://github.com/qemu/qemu/commit/646c39b220f789158313fee5d207f370e29c586a
Author: Song Gao <gaosong@loongson.cn>
Date: 2023-05-15 (Mon, 15 May 2023)
Changed paths:
M hw/intc/loongarch_extioi.c
M hw/loongarch/virt.c
M include/hw/intc/loongarch_extioi.h
M include/hw/loongarch/virt.h
Log Message:
-----------
hw/loongarch/virt: Set max 256 cpus support on loongarch virt machine
Add separate macro EXTIOI_CPUS for extioi interrupt controller, extioi
only supports 4 cpu. And set macro LOONGARCH_MAX_CPUS as 256 so that
loongarch virt machine supports more cpus.
Interrupts from external devices can only be routed cpu 0-3 because
of extioi limits, cpu internal interrupt such as timer/ipi can be
triggered on all cpus.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230512100421.1867848-3-gaosong@loongson.cn>
Commit: 7ef0eb35a4e6961d7e40f03f16ed241c95ae93f9
https://github.com/qemu/qemu/commit/7ef0eb35a4e6961d7e40f03f16ed241c95ae93f9
Author: Song Gao <gaosong@loongson.cn>
Date: 2023-05-15 (Mon, 15 May 2023)
Changed paths:
M hw/intc/loongarch_ipi.c
M hw/intc/trace-events
Log Message:
-----------
hw/intc: Add NULL pointer check on LoongArch ipi device
When ipi mailbox is used, cpu_index is decoded from iocsr register.
cpu maybe does not exist. This patch adds NULL pointer check on
ipi device.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230512100421.1867848-4-gaosong@loongson.cn>
Commit: 18b6727083acceac5d76ea0b8cb6f5cdef6858a7
https://github.com/qemu/qemu/commit/18b6727083acceac5d76ea0b8cb6f5cdef6858a7
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-05-15 (Mon, 15 May 2023)
Changed paths:
M MAINTAINERS
M hw/intc/loongarch_extioi.c
M hw/intc/loongarch_ipi.c
M hw/intc/trace-events
M hw/loongarch/virt.c
M include/hw/intc/loongarch_extioi.h
M include/hw/intc/loongarch_ipi.h
M include/hw/loongarch/virt.h
A tests/avocado/machine_loongarch.py
Log Message:
-----------
Merge tag 'pull-loongarch-20230515' of https://gitlab.com/gaosong/qemu into
staging
pull-loongarch-20230515
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# gpg: Signature made Mon 15 May 2023 04:12:06 AM PDT
# gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF
# gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF
* tag 'pull-loongarch-20230515' of https://gitlab.com/gaosong/qemu:
hw/intc: Add NULL pointer check on LoongArch ipi device
hw/loongarch/virt: Set max 256 cpus support on loongarch virt machine
hw/loongarch/virt: Modify ipi as percpu device
tests/avocado: Add LoongArch machine start test
loongarch: mark loongarch_ipi_iocsr re-entrnacy safe
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Compare: https://github.com/qemu/qemu/compare/67de9ebd0777...18b6727083ac
- [Qemu-commits] [qemu/qemu] 6d0589: loongarch: mark loongarch_ipi_iocsr re-entrnacy safe,
Richard Henderson <=