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| From: | Thiemo Seufer |
| Subject: | [Qemu-devel] qemu/target-mips cpu.h exec.h helper.c mips-def... |
| Date: | Wed, 06 Dec 2006 20:17:30 +0000 |
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 06/12/06 20:17:30
Modified files:
target-mips : cpu.h exec.h helper.c mips-defs.h op.c
op_helper.c translate.c
Log message:
Add MIPS32R2 instructions, and generally straighten out the instruction
decoding. This is also the first percent towards MIPS64 support.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/cpu.h?cvsroot=qemu&r1=1.12&r2=1.13
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/exec.h?cvsroot=qemu&r1=1.11&r2=1.12
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemu&r1=1.16&r2=1.17
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/mips-defs.h?cvsroot=qemu&r1=1.4&r2=1.5
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.14&r2=1.15
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_helper.c?cvsroot=qemu&r1=1.19&r2=1.20
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.21&r2=1.22
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