[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] Support For Octeon/Cavium CPU (MIPS system)
|
From: |
Paul Brook |
|
Subject: |
Re: [Qemu-devel] Support For Octeon/Cavium CPU (MIPS system) |
|
Date: |
Thu, 22 May 2008 17:03:59 +0100 |
|
User-agent: |
KMail/1.9.9 |
> : > I know that Cavium/octeon board are MIPS CPU.
> :
> : Not really. They're MIPS with extra weirdness.
>
> All SoCs are MIPS with extra documented weirdness. The OCTEON CPUs
> aren't documented in a public...
The Cavium cores are weirder than most. It doesn't use the normal MIPS ISA.
Most SoC are a standard mips core (r4k, etc.) with a bunch of peripherals.
Paul