Re: [Qemu-devel] [PATCH 09/11] PPC64: Fix NX bit

[Alexander Graf]

On 06.03.2009, at 20:31, Hollis Blanchard wrote:

> On Fri, 2009-03-06 at 16:36 +0100, Alexander Graf wrote:
> > This patch fixes two issues with the NX bit:
> >
> > 1) The guarded bit has nothing to do with NX.
>
> It turns out that instruction access is not allowed from mappings that
> have either N *or* G bits set. (There are also N bits in the segment
> entry; not sure how/if those are handled in this path.)

Oh, good to know.

Whoever applies this then, please keep the ORing for the guard  
bit :-). I don't think it's worth sending a new version here.

Alex

> > 2) ctx->nx only got ORed, but never reset. So when one page in the
> >   lifetime of the VM was ever NX, all later pages were too.
> >
> > Signed-off-by: Alexander Graf <address@hidden>
> > ---
> > target-ppc/helper.c |    3 +--
> > 1 files changed, 1 insertions(+), 2 deletions(-)
> >
> > diff --git a/target-ppc/helper.c b/target-ppc/helper.c
> > index 7fe3f8f..58b7fe2 100644
> > --- a/target-ppc/helper.c
> > +++ b/target-ppc/helper.c
> > @@ -226,8 +226,7 @@ static always_inline int _pte_check (mmu_ctx_t  
> > *ctx, int is_64b,
> >             ptem = pte0 & PTE64_PTEM_MASK;
> >             mmask = PTE64_CHECK_MASK;
> >             pp = (pte1 & 0x00000003) | ((pte1 >> 61) & 0x00000004);
> > -            ctx->nx |= (pte1 >> 2) & 1; /* No execute bit */
> > -            ctx->nx |= (pte1 >> 3) & 1; /* Guarded bit    */
> > +            ctx->nx = (pte1 >> 2) & 1; /* No execute bit */
> >         } else
> > #endif
> >         {
>
> --
> Hollis Blanchard
> IBM Linux Technology Center