On Sat, May 02, 2009 at 10:12:57PM +0300, Avi Kivity wrote:
Gleb Natapov wrote:
I think the right thing to do with this is introduce a kvm-cpu savevm
that stores this information since it isn't relevant to TCG. I
think it's arguable whether you want instruction length there (can
you get it reliably on SVM?).
We can't get it on SVM without instruction decoding, but it is not required
on SVM. It is absolutely essential for soft interrupt/exception injection
on VMX and has to be a part of migratable state.
We need it in some neutral form so cross-vendor migration can work.
VMX->SVM No problem.
SVM->VMX bad luck :) We will have to decode instruction ourself.