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[Qemu-devel] [PATCH 39/62] tcg-s390: Rearrange register allocation order
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 39/62] tcg-s390: Rearrange register allocation order. |
Date: |
Thu, 27 May 2010 13:46:21 -0700 |
Try to avoid conflicting with the outgoing function call arguments.
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/s390/tcg-target.c | 23 +++++++++++++----------
1 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c
index a26c963..eb57e24 100644
--- a/tcg/s390/tcg-target.c
+++ b/tcg/s390/tcg-target.c
@@ -186,22 +186,25 @@ static const char * const
tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
};
#endif
+/* Since R6 is a potential argument register, choose it last of the
+ call-saved registers. Likewise prefer the call-clobbered registers
+ in reverse order to maximize the chance of avoiding the arguments. */
static const int tcg_target_reg_alloc_order[] = {
- TCG_REG_R6,
- TCG_REG_R7,
- TCG_REG_R8,
- TCG_REG_R9,
- TCG_REG_R10,
- TCG_REG_R11,
- TCG_REG_R12,
TCG_REG_R13,
+ TCG_REG_R12,
+ TCG_REG_R11,
+ TCG_REG_R10,
+ TCG_REG_R9,
+ TCG_REG_R8,
+ TCG_REG_R7,
+ TCG_REG_R6,
TCG_REG_R14,
TCG_REG_R0,
TCG_REG_R1,
- TCG_REG_R2,
- TCG_REG_R3,
- TCG_REG_R4,
TCG_REG_R5,
+ TCG_REG_R4,
+ TCG_REG_R3,
+ TCG_REG_R2,
};
static const int tcg_target_call_iarg_regs[] = {
--
1.7.0.1
- [Qemu-devel] [PATCH 28/62] tcg-s390: Implement rotates., (continued)
- [Qemu-devel] [PATCH 28/62] tcg-s390: Implement rotates., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 29/62] tcg-s390: Use LOAD COMPLIMENT for negate., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 30/62] tcg-s390: Tidy unimplemented opcodes., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 31/62] tcg-s390: Use the extended-immediate facility for add/sub., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 32/62] tcg-s390: Implement immediate ANDs., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 33/62] tcg-s390: Implement immediate ORs., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 34/62] tcg-s390: Implement immediate MULs., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 35/62] tcg-s390: Implement immediate XORs., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 37/62] tcg-s390: Define TCG_TMP0., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 38/62] tcg-s390: Tidy regset initialization; use R14 as temporary., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 39/62] tcg-s390: Rearrange register allocation order.,
Richard Henderson <=
- [Qemu-devel] [PATCH 36/62] tcg-s390: Icache flush is a no-op., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 40/62] tcg-s390: Tidy goto_tb., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 41/62] tcg-s390: Allocate the code_gen_buffer near the main program., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 42/62] tcg-s390: Rearrange qemu_ld/st to avoid register copy., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 44/62] tcg-s390: Tidy user qemu_ld/st., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 45/62] tcg-s390: Implement GUEST_BASE., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 43/62] tcg-s390: Tidy tcg_prepare_qemu_ldst., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 47/62] tcg-s390: Conditionalize general-instruction-extension insns., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 48/62] tcg-s390: Conditionalize ADD IMMEDIATE instructions., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 46/62] tcg-s390: Query instruction extensions that are installed., Richard Henderson, 2010/05/27