[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 06/13] target-arm: Extend feature flags to 64 bits
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 06/13] target-arm: Extend feature flags to 64 bits |
Date: |
Thu, 28 Jun 2012 15:35:59 +0100 |
Extend feature flags to 64 bits, as we've just run out of space
in the 32 bit integer we were using for them.
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/cpu.c | 2 +-
target-arm/cpu.h | 6 +++---
target-arm/machine.c | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 526e725..b00f5fa 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -129,7 +129,7 @@ static void arm_cpu_reset(CPUState *s)
static inline void set_feature(CPUARMState *env, int feature)
{
- env->features |= 1u << feature;
+ env->features |= 1ULL << feature;
}
static void arm_cpu_initfn(Object *obj)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 82cad4b..3c5d2be 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -221,7 +221,7 @@ typedef struct CPUARMState {
/* These fields after the common ones so they are preserved on reset. */
/* Internal CPU feature flags. */
- uint32_t features;
+ uint64_t features;
void *nvic;
const struct arm_boot_info *boot_info;
@@ -392,7 +392,7 @@ enum arm_features {
static inline int arm_feature(CPUARMState *env, int feature)
{
- return (env->features & (1u << feature)) != 0;
+ return (env->features & (1ULL << feature)) != 0;
}
void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf);
@@ -638,7 +638,7 @@ static inline CPUARMState *cpu_init(const char *cpu_model)
#define cpu_signal_handler cpu_arm_signal_handler
#define cpu_list arm_cpu_list
-#define CPU_SAVE_VERSION 7
+#define CPU_SAVE_VERSION 8
/* MMU modes definitions */
#define MMU_MODE0_SUFFIX _kernel
diff --git a/target-arm/machine.c b/target-arm/machine.c
index a2a75fb..429cbc8 100644
--- a/target-arm/machine.c
+++ b/target-arm/machine.c
@@ -60,7 +60,7 @@ void cpu_save(QEMUFile *f, void *opaque)
qemu_put_be32(f, env->cp15.c15_diagnostic);
qemu_put_be32(f, env->cp15.c15_power_diagnostic);
- qemu_put_be32(f, env->features);
+ qemu_put_be64(f, env->features);
if (arm_feature(env, ARM_FEATURE_VFP)) {
for (i = 0; i < 16; i++) {
@@ -177,7 +177,7 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id)
env->cp15.c15_diagnostic = qemu_get_be32(f);
env->cp15.c15_power_diagnostic = qemu_get_be32(f);
- env->features = qemu_get_be32(f);
+ env->features = qemu_get_be64(f);
if (arm_feature(env, ARM_FEATURE_VFP)) {
for (i = 0; i < 16; i++) {
--
1.7.1
- [Qemu-devel] [PATCH 09/13] target-arm: Add 64 bit PAR, TTBR0, TTBR1 for LPAE, (continued)
- [Qemu-devel] [PATCH 09/13] target-arm: Add 64 bit PAR, TTBR0, TTBR1 for LPAE, Peter Maydell, 2012/06/28
- [Qemu-devel] [PATCH 07/13] target-arm: Add AMAIR0, AMAIR1 LPAE cp15 registers, Peter Maydell, 2012/06/28
- [Qemu-devel] [PATCH 04/13] ARM: Make target_phys_addr_t 64 bits and physaddrs 40 bits, Peter Maydell, 2012/06/28
- [Qemu-devel] [PATCH 08/13] target-arm: Add 64 bit variants of DBGDRAR and DBGDSAR for LPAE, Peter Maydell, 2012/06/28
- [Qemu-devel] [PATCH 12/13] target-arm: Implement TTBCR changes for LPAE, Peter Maydell, 2012/06/28
- [Qemu-devel] [PATCH 03/13] bitops.h: Add functions to extract and deposit bitfields, Peter Maydell, 2012/06/28
- [Qemu-devel] [PATCH 05/13] target-arm: Implement privileged-execute-never (PXN), Peter Maydell, 2012/06/28
- [Qemu-devel] [PATCH 11/13] target-arm: Implement long-descriptor PAR format, Peter Maydell, 2012/06/28
- [Qemu-devel] [PATCH 01/13] hw/cadence_gem: Make rx_desc_addr and tx_desc_addr uint32_t, Peter Maydell, 2012/06/28
- [Qemu-devel] [PATCH 13/13] target-arm: Add support for long format translation table walks, Peter Maydell, 2012/06/28
- [Qemu-devel] [PATCH 06/13] target-arm: Extend feature flags to 64 bits,
Peter Maydell <=