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[Qemu-devel] [PULL 06/24] xilinx_spips: Trash LQ page cache on mode chan
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 06/24] xilinx_spips: Trash LQ page cache on mode change |
Date: |
Mon, 3 Jun 2013 17:30:03 +0100 |
From: Peter Crosthwaite <address@hidden>
Invalidate the LQSPI cached page when transitioning into LQSPI mode.
Otherwise there is a possibility that the controller will return stale
data to the guest when transitioning back to LQ_MODE after a page
program.
Signed-off-by: Peter Crosthwaite <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/ssi/xilinx_spips.c | 25 ++++++++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index 86f33ef..cf4c43e 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -165,6 +165,8 @@ typedef struct {
typedef struct XilinxSPIPSClass {
SysBusDeviceClass parent_class;
+ const MemoryRegionOps *reg_ops;
+
uint32_t rx_fifo_size;
uint32_t tx_fifo_size;
} XilinxSPIPSClass;
@@ -462,6 +464,25 @@ static const MemoryRegionOps spips_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
};
+static void xilinx_qspips_write(void *opaque, hwaddr addr,
+ uint64_t value, unsigned size)
+{
+ XilinxQSPIPS *q = XILINX_QSPIPS(opaque);
+
+ xilinx_spips_write(opaque, addr, value, size);
+ addr >>= 2;
+
+ if (addr == R_LQSPI_CFG) {
+ q->lqspi_cached_addr = ~0ULL;
+ }
+}
+
+static const MemoryRegionOps qspips_ops = {
+ .read = xilinx_spips_read,
+ .write = xilinx_qspips_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
#define LQSPI_CACHE_SIZE 1024
static uint64_t
@@ -565,7 +586,7 @@ static void xilinx_spips_realize(DeviceState *dev, Error
**errp)
sysbus_init_irq(sbd, &s->cs_lines[i]);
}
- memory_region_init_io(&s->iomem, &spips_ops, s, "spi", R_MAX*4);
+ memory_region_init_io(&s->iomem, xsc->reg_ops, s, "spi", R_MAX*4);
sysbus_init_mmio(sbd, &s->iomem);
s->irqline = -1;
@@ -629,6 +650,7 @@ static void xilinx_qspips_class_init(ObjectClass *klass,
void * data)
XilinxSPIPSClass *xsc = XILINX_SPIPS_CLASS(klass);
dc->realize = xilinx_qspips_realize;
+ xsc->reg_ops = &qspips_ops;
xsc->rx_fifo_size = RXFF_A_Q;
xsc->tx_fifo_size = TXFF_A_Q;
}
@@ -643,6 +665,7 @@ static void xilinx_spips_class_init(ObjectClass *klass,
void *data)
dc->props = xilinx_spips_properties;
dc->vmsd = &vmstate_xilinx_spips;
+ xsc->reg_ops = &spips_ops;
xsc->rx_fifo_size = RXFF_A;
xsc->tx_fifo_size = TXFF_A;
}
--
1.7.9.5
- [Qemu-devel] [PULL 00/24] arm-devs queue, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 09/24] xilinx_spips: lqspi: Dont touch config register, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 10/24] xilinx_spips: Fix CTRL register RW bits, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 14/24] xilinx_spips: lqspi: Push more data to tx-fifo, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 24/24] i.MX: Improve EPIT timer code., Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 12/24] xilinx_spips: Debug msgs for Snoop state, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 13/24] xilinx_spips: Multiple debug verbosity levels, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 06/24] xilinx_spips: Trash LQ page cache on mode change,
Peter Maydell <=
- [Qemu-devel] [PULL 15/24] xilinx_spips: lqspi: Fix byte/misaligned access, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 19/24] sd/sdhci:ADMA: fix interrupt, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 23/24] exynos4210.c: register rom_mem for memory migration, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 16/24] sd/sdhci.c: Only reset data_count on new commands, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 03/24] xilinx_spips: Inhibit interrupts in LQSPI mode, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 05/24] xilinx_spips: Fix QSPI FIFO size, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 04/24] xilinx_spips: Add verbose LQSPI debug output, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 21/24] i.MX: split GPT and EPIT timer implementation, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 17/24] sd/sdhci: Fix Buffer Write Ready interrupt, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 08/24] xilinx_spips: Implement automatic CS, Peter Maydell, 2013/06/03