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From: | Benoît Canet |
Subject: | Re: [Qemu-devel] KVM guest cpu L3 cache and cpufreq |
Date: | Mon, 26 Aug 2013 18:45:27 +0200 |
User-agent: | Mutt/1.5.21 (2010-09-15) |
> Talk to Eduardo since this is related to cpuid configuration and he is > an expert. I found the following in target-i386/cpu.c case 0x80000006: /* cache info (L2 cache) */ *eax = 0; *ebx = 0x42004200; *ecx = 0x02008140; *edx = 0; break; >From the AMD cpuid book it look like the L3 settings are not defined (edx). Eduardo: A user I know want to be able to set the size of the guest L3 cache. I am ok to write a patch to do so. Do you have some recommandations regarding the other fields of the edx register ? What would be an acceptable user interface to set this ? Best regards Benoît
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