[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 04/29] target-ppc: Little Endian Correction to Load/S
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PULL 04/29] target-ppc: Little Endian Correction to Load/Store Vector Element |
Date: |
Fri, 25 Oct 2013 23:27:29 +0200 |
From: Tom Musta <address@hidden>
The Load Vector Element (lve*x) and Store Vector Element (stve*x)
instructions not only byte-swap in Little Endian mode, they also
invert the element that is accessed. For example, the RTL for
lvehx contains this:
eb <-- EA[60:63]
if Big-Endian byte ordering then
VRT[8*eb:8*eb+15] <-- MEM(EA,2)
else
VRT[112-(8*eb):127-(8*eb)] <-- MEM(EA,2)
This patch adds the element inversion, as described in the last line
of the RTL.
Signed-off-by: Tom Musta <address@hidden>
Reviewed-by: Anton Blanchard <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/mem_helper.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target-ppc/mem_helper.c b/target-ppc/mem_helper.c
index d8e63ca..f35ed03 100644
--- a/target-ppc/mem_helper.c
+++ b/target-ppc/mem_helper.c
@@ -212,6 +212,7 @@ target_ulong helper_lscbx(CPUPPCState *env, target_ulong
addr, uint32_t reg,
int index = (addr & 0xf) >> sh; \
\
if (msr_le) { \
+ index = n_elems - index - 1; \
r->element[LO_IDX ? index : (adjust - index)] = \
swap(access(env, addr)); \
} else { \
@@ -236,6 +237,7 @@ LVE(lvewx, cpu_ldl_data, bswap32, u32)
int index = (addr & 0xf) >> sh; \
\
if (msr_le) { \
+ index = n_elems - index - 1; \
access(env, addr, swap(r->element[LO_IDX ? index : \
(adjust - index)])); \
} else { \
--
1.8.1.4
- [Qemu-devel] [PULL 00/29] ppc patch queue 2013-10-2 5, Alexander Graf, 2013/10/25
- [Qemu-devel] [PULL 02/29] pseries: Fix loading of little endian kernels, Alexander Graf, 2013/10/25
- [Qemu-devel] [PULL 07/29] spapr: Add ibm, purr property on power7 and newer, Alexander Graf, 2013/10/25
- [Qemu-devel] [PULL 03/29] ppc: Add CFAR, DAR and DSISR to the dictionary of printable registers, Alexander Graf, 2013/10/25
- [Qemu-devel] [PULL 04/29] target-ppc: Little Endian Correction to Load/Store Vector Element,
Alexander Graf <=
- [Qemu-devel] [PULL 19/29] xics: Implement H_IPOLL, Alexander Graf, 2013/10/25
- [Qemu-devel] [PULL 11/29] spapr: move cpu_setup after kvmppc_set_papr, Alexander Graf, 2013/10/25
- [Qemu-devel] [PULL 20/29] xics: Implement H_XIRR_X, Alexander Graf, 2013/10/25
- [Qemu-devel] [PULL 05/29] PPC: Fix L2CR write accesses, Alexander Graf, 2013/10/25
- [Qemu-devel] [PULL 10/29] xics: move reset and cpu_setup, Alexander Graf, 2013/10/25
- [Qemu-devel] [PULL 08/29] spapr-rtas: fix h_rtas parameters reading, Alexander Graf, 2013/10/25
- [Qemu-devel] [PULL 15/29] xics: add missing const specifiers to TypeInfo, Alexander Graf, 2013/10/25
- [Qemu-devel] [PULL 12/29] xics: replace fprintf with error_report, Alexander Graf, 2013/10/25
- [Qemu-devel] [PULL 17/29] xics: add cpu_setup callback, Alexander Graf, 2013/10/25
- [Qemu-devel] [PULL 13/29] xics: add pre_save/post_load dispatchers, Alexander Graf, 2013/10/25