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[Qemu-devel] [PATCH 07/13] target-openrisc: Correct l.cmov conditional c
From: |
Sebastian Macke |
Subject: |
[Qemu-devel] [PATCH 07/13] target-openrisc: Correct l.cmov conditional check |
Date: |
Tue, 29 Oct 2013 20:04:49 +0100 |
srf is a boolean variable.
Therefore the instruction should check for != 0 and not for != SR_F
Signed-off-by: Sebastian Macke <address@hidden>
---
target-openrisc/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index 378ff1b..9fd1126 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -565,7 +565,7 @@ static void dec_calc(DisasContext *dc, uint32_t insn)
int lab = gen_new_label();
TCGv res = tcg_temp_local_new();
tcg_gen_mov_tl(res, cpu_R[rb]);
- tcg_gen_brcondi_tl(TCG_COND_NE, cpu_srf, SR_F, lab);
+ tcg_gen_brcondi_tl(TCG_COND_NE, cpu_srf, 0, lab);
tcg_gen_mov_tl(res, cpu_R[ra]);
gen_set_label(lab);
tcg_gen_mov_tl(cpu_R[rd], res);
--
1.8.4.1
- Re: [Qemu-devel] [PATCH 06/13] target-openrisc: Remove TLB flush from l.rfe instruction, (continued)
[Qemu-devel] [PATCH 04/13] target-openrisc: sync flags only when necessary, Sebastian Macke, 2013/10/29
[Qemu-devel] [PATCH 02/13] target-openrisc: Separate Delayed slot handling from main loop, Sebastian Macke, 2013/10/29
[Qemu-devel] [PATCH 07/13] target-openrisc: Correct l.cmov conditional check,
Sebastian Macke <=
[Qemu-devel] [PATCH 05/13] target-openrisc: Remove TLB flush on exception, Sebastian Macke, 2013/10/29
[Qemu-devel] [PATCH 08/13] target-openrisc: Test for Overflow exception statically, Sebastian Macke, 2013/10/29
[Qemu-devel] [PATCH 09/13] target-openrisc: Add CPU which neglects Carry and Overflow Flag, Sebastian Macke, 2013/10/29