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[Qemu-devel] [PATCH 1/4] target-ppc: POWER8 supports the MSR_LE bit
From: |
Anton Blanchard |
Subject: |
[Qemu-devel] [PATCH 1/4] target-ppc: POWER8 supports the MSR_LE bit |
Date: |
Thu, 6 Mar 2014 15:49:12 +1100 |
Add MSR_LE to the msr_mask for POWER8.
Signed-off-by: Anton Blanchard <address@hidden>
---
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 3eafbb0..7661543 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7173,7 +7173,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 |
PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 |
PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207;
- pcc->msr_mask = 0x800000000284FF36ULL;
+ pcc->msr_mask = 0x800000000284FF37ULL;
pcc->mmu_model = POWERPC_MMU_2_06;
#if defined(CONFIG_SOFTMMU)
pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault;
- [Qemu-devel] [PATCH 1/4] target-ppc: POWER8 supports the MSR_LE bit,
Anton Blanchard <=