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[Qemu-devel] [PULL 063/130] target-ppc: Add ISA 2.06 fcfid[u][s] Instruc
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PULL 063/130] target-ppc: Add ISA 2.06 fcfid[u][s] Instructions |
Date: |
Fri, 7 Mar 2014 00:33:10 +0100 |
From: Tom Musta <address@hidden>
This patch adds the fcfids, fcfidu and fcfidus instructions which
were introduced in Power ISA 2.06B. A common macro is provided to
eliminate repetitious code, and the existing fcfid instruction is
refactored to use this macro.
Signed-off-by: Tom Musta <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/fpu_helper.c | 28 +++++++++++++++++++---------
target-ppc/helper.h | 3 +++
target-ppc/translate.c | 9 +++++++++
3 files changed, 31 insertions(+), 9 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 2f9f4dc..eb56082 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -637,16 +637,26 @@ FPU_FCTI(fctiduz, uint64_round_to_zero,
0x0000000000000000)
#endif
#if defined(TARGET_PPC64)
-/* fcfid - fcfid. */
-uint64_t helper_fcfid(CPUPPCState *env, uint64_t arg)
-{
- CPU_DoubleU farg;
-
- farg.d = int64_to_float64(arg, &env->fp_status);
- return farg.ll;
-}
-
+#define FPU_FCFI(op, cvtr, is_single) \
+uint64_t helper_##op(CPUPPCState *env, uint64_t arg) \
+{ \
+ CPU_DoubleU farg; \
+ \
+ if (is_single) { \
+ float32 tmp = cvtr(arg, &env->fp_status); \
+ farg.d = float32_to_float64(tmp, &env->fp_status); \
+ } else { \
+ farg.d = cvtr(arg, &env->fp_status); \
+ } \
+ helper_float_check_status(env); \
+ return farg.ll; \
+}
+
+FPU_FCFI(fcfid, int64_to_float64, 0)
+FPU_FCFI(fcfids, int64_to_float32, 1)
+FPU_FCFI(fcfidu, uint64_to_float64, 0)
+FPU_FCFI(fcfidus, uint64_to_float32, 1)
#endif
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index a32a75a..c7c915f 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -71,6 +71,9 @@ DEF_HELPER_2(fctiwz, i64, env, i64)
DEF_HELPER_2(fctiwuz, i64, env, i64)
#if defined(TARGET_PPC64)
DEF_HELPER_2(fcfid, i64, env, i64)
+DEF_HELPER_2(fcfidu, i64, env, i64)
+DEF_HELPER_2(fcfids, i64, env, i64)
+DEF_HELPER_2(fcfidus, i64, env, i64)
DEF_HELPER_2(fctid, i64, env, i64)
DEF_HELPER_2(fctidu, i64, env, i64)
DEF_HELPER_2(fctidz, i64, env, i64)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index f13cda6..4c08fe5 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -2213,6 +2213,12 @@ GEN_FLOAT_B(rsp, 0x0C, 0x00, 1, PPC_FLOAT);
#if defined(TARGET_PPC64)
/* fcfid */
GEN_FLOAT_B(cfid, 0x0E, 0x1A, 1, PPC_64B);
+/* fcfids */
+GEN_FLOAT_B(cfids, 0x0E, 0x1A, 0, PPC2_FP_CVT_ISA206);
+/* fcfidu */
+GEN_FLOAT_B(cfidu, 0x0E, 0x1E, 0, PPC2_FP_CVT_ISA206);
+/* fcfidus */
+GEN_FLOAT_B(cfidus, 0x0E, 0x1E, 0, PPC2_FP_CVT_ISA206);
/* fctid */
GEN_FLOAT_B(ctid, 0x0E, 0x19, 0, PPC_64B);
/* fctidu */
@@ -9857,6 +9863,9 @@ GEN_HANDLER_E(fctiwuz, 0x3F, 0x0F, 0x04, 0, PPC_NONE,
PPC2_FP_CVT_ISA206),
GEN_FLOAT_B(rsp, 0x0C, 0x00, 1, PPC_FLOAT),
#if defined(TARGET_PPC64)
GEN_FLOAT_B(cfid, 0x0E, 0x1A, 1, PPC_64B),
+GEN_HANDLER_E(fcfids, 0x3B, 0x0E, 0x1A, 0, PPC_NONE, PPC2_FP_CVT_ISA206),
+GEN_HANDLER_E(fcfidu, 0x3F, 0x0E, 0x1E, 0, PPC_NONE, PPC2_FP_CVT_ISA206),
+GEN_HANDLER_E(fcfidus, 0x3B, 0x0E, 0x1E, 0, PPC_NONE, PPC2_FP_CVT_ISA206),
GEN_FLOAT_B(ctid, 0x0E, 0x19, 0, PPC_64B),
GEN_HANDLER_E(fctidu, 0x3F, 0x0E, 0x1D, 0, PPC_NONE, PPC2_FP_CVT_ISA206),
GEN_FLOAT_B(ctidz, 0x0F, 0x19, 0, PPC_64B),
--
1.8.1.4
- [Qemu-devel] [PULL 071/130] virtex_ml507: Add support for loading initrd images, (continued)
- [Qemu-devel] [PULL 071/130] virtex_ml507: Add support for loading initrd images, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 061/130] target-ppc: Add Flag for ISA V2.06 Floating Point Conversion, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 065/130] target-ppc: Add Flag for Power ISA V2.06 Floating Point Test Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 067/130] target-ppc: Add ISA 2.06 ftsqrt, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 070/130] PPC: KVM: store SLB slot number, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 064/130] target-ppc: Fix and enable fri[mnpz], Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 060/130] target-ppc: Add ISA 2.06 stbcx. and sthcx. Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 072/130] PPC: KVM: suppress warnings about not supported SPRs, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 077/130] spapr: print more detailed error message on failed load_elf(), Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 066/130] target-ppc: Add ISA 2.06 ftdiv Instruction, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 063/130] target-ppc: Add ISA 2.06 fcfid[u][s] Instructions,
Alexander Graf <=
- [Qemu-devel] [PULL 059/130] target-ppc: Add ISA2.06 lbarx, lharx Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 074/130] spapr: support only ELF kernel images, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 062/130] target-ppc: Add ISA2.06 Float to Integer Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 076/130] elf-loader: add more return codes, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 075/130] moxie: fix load_elf() usage, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 080/130] target-ppc: add extended opcodes for dcbt/dcbtst, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 081/130] target-ppc: Fix xxpermdi When T==A or T==B, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 083/130] target-ppc: Add Target Address SPR (TAR) to Power8, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 078/130] target-ppc: Update external_htab even when HTAB is managed by kernel, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 079/130] qdev: Keep global allocation counter per bus, Alexander Graf, 2014/03/06