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[Qemu-devel] [PULL 0/9] target-arm queue
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 0/9] target-arm queue |
Date: |
Mon, 10 Mar 2014 15:09:11 +0000 |
target-arm queue. I'm expecting to do another queue run before
hard freeze, since there are still some bits and pieces on
list which need a little more review before they can be
committed.
thanks
-- PMM
The following changes since commit e9d818b8b1a7fadc6c92256b716f1bc21b8daabc:
Merge remote-tracking branch 'remotes/rth/tcg-aarch-6-1' into staging
(2014-03-10 12:34:41 +0000)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20140310
for you to fetch changes up to 72c1d3af6e9c2745edfeaa71918a68bcee4b79db:
target-arm: Implement WFE as a yield operation (2014-03-10 14:56:30 +0000)
----------------------------------------------------------------
target-arm queue:
* implement WFE as yield (improves performance with emulated SMP)
* fixes to avoid undefined behaviour shifting left into sign bit
* libvixl format string fixes for 32 bit hosts
* fix build error when intptr_t and tcg_target_long are different
sizes (eg x32)
* implement PMCCNTR register
* fix incorrect setting of E bit in CPSR (broke booting under
KVM on ARM)
----------------------------------------------------------------
Alistair Francis (1):
target-arm: Implements the ARM PMCCNTR register
Peter Maydell (6):
target-arm: Fix incorrect setting of E bit in CPSR
pxa2xx: Don't shift into sign bit
hw/arm/omap1.c: Avoid shifting left into sign bit
hw/ssi/xilinx_spips.c: Avoid shifting left into sign bit
hw/arm/musicpal: Avoid shifting left into sign bit
target-arm: Implement WFE as a yield operation
Richard Henderson (1):
target-arm: Fix intptr_t vs tcg_target_long
Stefan Weil (1):
libvixl: Fix format strings for several int64_t values
disas/libvixl/a64/disasm-a64.cc | 20 ++++-----
hw/arm/musicpal.c | 4 +-
hw/arm/omap1.c | 24 ++++++-----
hw/arm/pxa2xx.c | 6 +--
hw/arm/pxa2xx_gpio.c | 2 +-
hw/arm/pxa2xx_pic.c | 4 +-
hw/ssi/xilinx_spips.c | 4 +-
include/exec/cpu-defs.h | 1 +
target-arm/cpu.h | 4 ++
target-arm/helper.c | 91 ++++++++++++++++++++++++++++++++++++++---
target-arm/helper.h | 1 +
target-arm/op_helper.c | 9 ++++
target-arm/translate-a64.c | 2 +-
target-arm/translate.c | 6 +++
target-arm/translate.h | 2 +
15 files changed, 144 insertions(+), 36 deletions(-)
- [Qemu-devel] [PULL 0/9] target-arm queue,
Peter Maydell <=
- [Qemu-devel] [PULL 3/9] target-arm: Fix intptr_t vs tcg_target_long, Peter Maydell, 2014/03/10
- [Qemu-devel] [PULL 9/9] target-arm: Implement WFE as a yield operation, Peter Maydell, 2014/03/10
- [Qemu-devel] [PULL 4/9] libvixl: Fix format strings for several int64_t values, Peter Maydell, 2014/03/10
- [Qemu-devel] [PULL 7/9] hw/ssi/xilinx_spips.c: Avoid shifting left into sign bit, Peter Maydell, 2014/03/10
- [Qemu-devel] [PULL 6/9] hw/arm/omap1.c: Avoid shifting left into sign bit, Peter Maydell, 2014/03/10
- [Qemu-devel] [PULL 5/9] pxa2xx: Don't shift into sign bit, Peter Maydell, 2014/03/10
- [Qemu-devel] [PULL 2/9] target-arm: Implements the ARM PMCCNTR register, Peter Maydell, 2014/03/10
- [Qemu-devel] [PULL 8/9] hw/arm/musicpal: Avoid shifting left into sign bit, Peter Maydell, 2014/03/10
- [Qemu-devel] [PULL 1/9] target-arm: Fix incorrect setting of E bit in CPSR, Peter Maydell, 2014/03/10
- Re: [Qemu-devel] [PULL 0/9] target-arm queue, Peter Maydell, 2014/03/11