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[Qemu-devel] [PATCH v2 04/25] target-arm: A64: Add FSQRT to C3.6.17 (two
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH v2 04/25] target-arm: A64: Add FSQRT to C3.6.17 (two misc) |
Date: |
Fri, 14 Mar 2014 18:37:53 +0000 |
From: Alex Bennée <address@hidden>
Implement FSQRT in the two-reg-misc category.
GCC uses this instruction form.
Signed-off-by: Alex Bennée <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/translate-a64.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 550decc..427f484 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -6623,6 +6623,9 @@ static void handle_2misc_64(DisasContext *s, int opcode,
bool u,
case 0x6f: /* FNEG */
gen_helper_vfp_negd(tcg_rd, tcg_rn);
break;
+ case 0x7f: /* FSQRT */
+ gen_helper_vfp_sqrtd(tcg_rd, tcg_rn, cpu_env);
+ break;
default:
g_assert_not_reached();
}
@@ -8392,6 +8395,12 @@ static void disas_simd_two_reg_misc(DisasContext *s,
uint32_t insn)
}
handle_2misc_fcmp_zero(s, opcode, false, u, is_q, size, rn, rd);
return;
+ case 0x7f: /* FSQRT */
+ if (size == 3 && !is_q) {
+ unallocated_encoding(s);
+ return;
+ }
+ break;
case 0x16: /* FCVTN, FCVTN2 */
case 0x17: /* FCVTL, FCVTL2 */
case 0x18: /* FRINTN */
@@ -8416,7 +8425,6 @@ static void disas_simd_two_reg_misc(DisasContext *s,
uint32_t insn)
case 0x7b: /* FCVTZU */
case 0x7c: /* URSQRTE */
case 0x7d: /* FRSQRTE */
- case 0x7f: /* FSQRT */
unsupported_encoding(s, insn);
return;
default:
@@ -8493,6 +8501,9 @@ static void disas_simd_two_reg_misc(DisasContext *s,
uint32_t insn)
case 0x6f: /* FNEG */
gen_helper_vfp_negs(tcg_res, tcg_op);
break;
+ case 0x7f: /* FSQRT */
+ gen_helper_vfp_sqrts(tcg_res, tcg_op, cpu_env);
+ break;
default:
g_assert_not_reached();
}
--
1.9.0
- [Qemu-devel] [PATCH v2 19/25] softfloat: export squash_input_denormal functions, (continued)
- [Qemu-devel] [PATCH v2 19/25] softfloat: export squash_input_denormal functions, Peter Maydell, 2014/03/14
- [Qemu-devel] [PATCH v2 05/25] target-arm: A64: Add remaining CLS/Z vector ops, Peter Maydell, 2014/03/14
- [Qemu-devel] [PATCH v2 06/25] target-arm: A64: Saturating and narrowing shift ops, Peter Maydell, 2014/03/14
- [Qemu-devel] [PATCH v2 17/25] target-arm: A64: Handle saturating left shifts SQSHL, SQSHLU, UQSHL, Peter Maydell, 2014/03/14
- [Qemu-devel] [PATCH v2 03/25] target-arm: A64: Add last AdvSIMD Integer to FP ops, Peter Maydell, 2014/03/14
- [Qemu-devel] [PATCH v2 18/25] target-arm: A64: Implement FCVTZS, FCVTZU in the shift-imm categories, Peter Maydell, 2014/03/14
- [Qemu-devel] [PATCH v2 16/25] exec-all.h: Increase MAX_OP_PER_INSTR for ARM A64 decoder, Peter Maydell, 2014/03/14
- [Qemu-devel] [PATCH v2 09/25] target-arm: A64: Implement FCVT[NMAPZ][SU] SIMD instructions, Peter Maydell, 2014/03/14
- [Qemu-devel] [PATCH v2 14/25] target-arm: A64: Implement SRI, Peter Maydell, 2014/03/14
- [Qemu-devel] [PATCH v2 12/25] target-arm: A64: List unsupported shift-imm opcodes, Peter Maydell, 2014/03/14
- [Qemu-devel] [PATCH v2 04/25] target-arm: A64: Add FSQRT to C3.6.17 (two misc),
Peter Maydell <=
- [Qemu-devel] [PATCH v2 22/25] target-arm: A64: Implement scalar saturating narrow ops, Peter Maydell, 2014/03/14
- [Qemu-devel] [PATCH v2 02/25] target-arm: A64: Fix bug in add_sub_ext handling of rn, Peter Maydell, 2014/03/14
- [Qemu-devel] [PATCH v2 25/25] scripts/qemu-binfmt-conf.sh: Add AArch64 registration, Peter Maydell, 2014/03/14
- [Qemu-devel] [PATCH v2 01/25] target-arm: A64: Implement PMULL instruction, Peter Maydell, 2014/03/14
- [Qemu-devel] [PATCH v2 13/25] target-arm: A64: Add FRECPX (reciprocal exponent), Peter Maydell, 2014/03/14
- [Qemu-devel] [PATCH v2 20/25] target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPE, Peter Maydell, 2014/03/14
- [Qemu-devel] [PATCH v2 24/25] target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate), Peter Maydell, 2014/03/14
- [Qemu-devel] [PATCH v2 11/25] target-arm: A64: Implement FCVTL, Peter Maydell, 2014/03/14
- Re: [Qemu-devel] [PATCH v2 00/25] A64: Neon patches, sixth set, Richard Henderson, 2014/03/14