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[Qemu-devel] [PATCH 8/8] tcg-sparc: Define TCG_TARGET_ITYPE_SIZE
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 8/8] tcg-sparc: Define TCG_TARGET_ITYPE_SIZE |
Date: |
Fri, 28 Mar 2014 17:27:14 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/sparc/tcg-target.c | 57 ++++++++++++++++++++++++--------------------------
tcg/sparc/tcg-target.h | 2 +-
2 files changed, 28 insertions(+), 31 deletions(-)
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 152335c..44d8995 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -253,37 +253,32 @@ static inline int check_fit_i32(uint32_t val, unsigned
int bits)
return ((val << (32 - bits)) >> (32 - bits)) == val;
}
-static void patch_reloc(uint8_t *code_ptr, int type,
+static void patch_reloc(tcg_itype *code_ptr, int type,
intptr_t value, intptr_t addend)
{
uint32_t insn;
+
value += addend;
switch (type) {
- case R_SPARC_32:
- if (value != (uint32_t)value) {
- tcg_abort();
- }
- *(uint32_t *)code_ptr = value;
- break;
case R_SPARC_WDISP16:
value -= (intptr_t)code_ptr;
if (!check_fit_tl(value >> 2, 16)) {
tcg_abort();
}
- insn = *(uint32_t *)code_ptr;
+ insn = *code_ptr;
insn &= ~INSN_OFF16(-1);
insn |= INSN_OFF16(value);
- *(uint32_t *)code_ptr = insn;
+ *code_ptr = insn;
break;
case R_SPARC_WDISP19:
value -= (intptr_t)code_ptr;
if (!check_fit_tl(value >> 2, 19)) {
tcg_abort();
}
- insn = *(uint32_t *)code_ptr;
+ insn = *code_ptr;
insn &= ~INSN_OFF19(-1);
insn |= INSN_OFF19(value);
- *(uint32_t *)code_ptr = insn;
+ *code_ptr = insn;
break;
default:
tcg_abort();
@@ -544,10 +539,10 @@ static void tcg_out_bpcc(TCGContext *s, int scond, int
flags, int label)
int off19;
if (l->has_value) {
- off19 = INSN_OFF19(l->u.value - (unsigned long)s->code_ptr);
+ off19 = INSN_OFF19(l->u.value - (uintptr_t)s->code_ptr);
} else {
/* Make sure to preserve destinations during retranslation. */
- off19 = *(uint32_t *)s->code_ptr & INSN_OFF19(-1);
+ off19 = *s->code_ptr & INSN_OFF19(-1);
tcg_out_reloc(s, s->code_ptr, R_SPARC_WDISP19, label, 0);
}
tcg_out_bpcc0(s, scond, flags, off19);
@@ -592,10 +587,10 @@ static void tcg_out_brcond_i64(TCGContext *s, TCGCond
cond, TCGArg arg1,
int off16;
if (l->has_value) {
- off16 = INSN_OFF16(l->u.value - (unsigned long)s->code_ptr);
+ off16 = INSN_OFF16(l->u.value - (uintptr_t)s->code_ptr);
} else {
/* Make sure to preserve destinations during retranslation. */
- off16 = *(uint32_t *)s->code_ptr & INSN_OFF16(-1);
+ off16 = *s->code_ptr & INSN_OFF16(-1);
tcg_out_reloc(s, s->code_ptr, R_SPARC_WDISP16, label, 0);
}
tcg_out32(s, INSN_OP(0) | INSN_OP2(3) | BPR_PT | INSN_RS1(arg1)
@@ -1046,7 +1041,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg
*args, bool is64)
TCGReg addrz, param;
uintptr_t func;
int memi;
- uint32_t *label_ptr[2];
+ tcg_itype *label_ptr[2];
#endif
datalo = *args++;
@@ -1065,7 +1060,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg
*args, bool is64)
int reg64;
/* bne,pn %[xi]cc, label0 */
- label_ptr[0] = (uint32_t *)s->code_ptr;
+ label_ptr[0] = s->code_ptr;
tcg_out_bpcc0(s, COND_NE, BPCC_PN
| (TARGET_LONG_BITS == 64 ? BPCC_XCC : BPCC_ICC), 0);
tcg_out_nop(s);
@@ -1082,7 +1077,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg
*args, bool is64)
}
/* b,a,pt label1 */
- label_ptr[1] = (uint32_t *)s->code_ptr;
+ label_ptr[1] = s->code_ptr;
tcg_out_bpcc0(s, COND_A, BPCC_A | BPCC_PT, 0);
} else {
/* The fast path is exactly one insn. Thus we can perform the
@@ -1091,7 +1086,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg
*args, bool is64)
/* beq,a,pt %[xi]cc, label0 */
label_ptr[0] = NULL;
- label_ptr[1] = (uint32_t *)s->code_ptr;
+ label_ptr[1] = s->code_ptr;
tcg_out_bpcc0(s, COND_E, BPCC_A | BPCC_PT
| (TARGET_LONG_BITS == 64 ? BPCC_XCC : BPCC_ICC), 0);
/* delay slot */
@@ -1101,8 +1096,8 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg
*args, bool is64)
/* TLB Miss. */
if (label_ptr[0]) {
- *label_ptr[0] |= INSN_OFF19((unsigned long)s->code_ptr -
- (unsigned long)label_ptr[0]);
+ *label_ptr[0] |= INSN_OFF19((uintptr_t)s->code_ptr -
+ (uintptr_t)label_ptr[0]);
}
param = TCG_REG_O1;
@@ -1140,8 +1135,8 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg
*args, bool is64)
break;
}
- *label_ptr[1] |= INSN_OFF19((unsigned long)s->code_ptr -
- (unsigned long)label_ptr[1]);
+ *label_ptr[1] |= INSN_OFF19((uintptr_t)s->code_ptr -
+ (uintptr_t)label_ptr[1]);
#else
if (TCG_TARGET_REG_BITS == 64 && TARGET_LONG_BITS == 32) {
tcg_out_arithi(s, TCG_REG_T1, addrlo, 0, SHIFT_SRL);
@@ -1174,7 +1169,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg
*args, bool is64)
TCGReg addrz, datafull, param;
uintptr_t func;
int memi;
- uint32_t *label_ptr;
+ tcg_itype *label_ptr;
#endif
datalo = *args++;
@@ -1201,7 +1196,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg
*args, bool is64)
/* The fast path is exactly one insn. Thus we can perform the entire
TLB Hit in the (annulled) delay slot of the branch over TLB Miss. */
/* beq,a,pt %[xi]cc, label0 */
- label_ptr = (uint32_t *)s->code_ptr;
+ label_ptr = s->code_ptr;
tcg_out_bpcc0(s, COND_E, BPCC_A | BPCC_PT
| (TARGET_LONG_BITS == 64 ? BPCC_XCC : BPCC_ICC), 0);
/* delay slot */
@@ -1225,8 +1220,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg
*args, bool is64)
/* delay slot */
tcg_out_movi(s, TCG_TYPE_REG, param, memi);
- *label_ptr |= INSN_OFF19((unsigned long)s->code_ptr -
- (unsigned long)label_ptr);
+ *label_ptr |= INSN_OFF19((uintptr_t)s->code_ptr -
+ (uintptr_t)label_ptr);
#else
if (TCG_TARGET_REG_BITS == 64 && TARGET_LONG_BITS == 32) {
tcg_out_arithi(s, TCG_REG_T1, addrlo, 0, SHIFT_SRL);
@@ -1259,8 +1254,9 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc, const TCGArg *args,
case INDEX_op_goto_tb:
if (s->tb_jmp_offset) {
/* direct jump method */
- uint32_t old_insn = *(uint32_t *)s->code_ptr;
- s->tb_jmp_offset[args[0]] = s->code_ptr - s->code_buf;
+ uint32_t old_insn = *s->code_ptr;
+ s->tb_jmp_offset[args[0]]
+ = (uintptr_t)s->code_ptr - (uintptr_t)s->code_buf;
/* Make sure to preserve links during retranslation. */
tcg_out32(s, CALL | (old_insn & ~INSN_OP(-1)));
} else {
@@ -1269,7 +1265,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc, const TCGArg *args,
tcg_out_arithi(s, TCG_REG_G0, TCG_REG_T1, 0, JMPL);
}
tcg_out_nop(s);
- s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf;
+ s->tb_next_offset[args[0]]
+ = (uintptr_t)s->code_ptr - (uintptr_t)s->code_buf;
break;
case INDEX_op_call:
if (const_args[0]) {
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
index 3abf1b4..ab00af1 100644
--- a/tcg/sparc/tcg-target.h
+++ b/tcg/sparc/tcg-target.h
@@ -33,7 +33,7 @@
#endif
#define TCG_TARGET_WORDS_BIGENDIAN
-
+#define TCG_TARGET_ITYPE_SIZE 4
#define TCG_TARGET_NB_REGS 32
typedef enum {
--
1.9.0
- [Qemu-devel] [PATCH 0/8] tcg: tidy the type of code_ptr, Richard Henderson, 2014/03/28
- [Qemu-devel] [PATCH 1/8] exec-all.h: Use stl_p to avoid undefined behaviour patching x86 jumps, Richard Henderson, 2014/03/28
- [Qemu-devel] [PATCH 2/8] tcg: Avoid stores to unaligned addresses, Richard Henderson, 2014/03/28
- [Qemu-devel] [PATCH 3/8] tcg: Avoid undefined behaviour patching code at unaligned addresses, Richard Henderson, 2014/03/28
- [Qemu-devel] [PATCH 4/8] tcg: Define tcg_itype for code pointers, Richard Henderson, 2014/03/28
- [Qemu-devel] [PATCH 5/8] tcg-ppc64: Define TCG_TARGET_ITYPE_SIZE, Richard Henderson, 2014/03/28
- [Qemu-devel] [PATCH 6/8] tcg-ppc: Define TCG_TARGET_ITYPE_SIZE, Richard Henderson, 2014/03/28
- [Qemu-devel] [PATCH 7/8] tcg-aarch64: Define TCG_TARGET_ITYPE_SIZE, Richard Henderson, 2014/03/28
- [Qemu-devel] [PATCH 8/8] tcg-sparc: Define TCG_TARGET_ITYPE_SIZE,
Richard Henderson <=
- Re: [Qemu-devel] [PATCH 0/8] tcg: tidy the type of code_ptr, Peter Maydell, 2014/03/29