Re: [Qemu-devel] [PATCH v5 06/15] target-tricore: Add instructions of SRC opcode format

[Richard Henderson]

On 08/13/2014 05:07 AM, Bastian Koppelmann wrote:
> +static void gen_shaci(TCGv ret, TCGv r1, int32_t shift_count)
> +{
> +    uint32_t msk, msk_start;
> +    TCGv temp = tcg_temp_new();
> +    TCGv temp2 = tcg_temp_new();
> +    TCGv t_0 = tcg_const_i32(0);
> +
> +    if (shift_count == 0) {
> +        /* Clear PSW.C and PSW.V */
> +        tcg_gen_movi_tl(cpu_PSW_C, 0);
> +        tcg_gen_mov_tl(cpu_PSW_V, cpu_PSW_C);
> +        tcg_gen_mov_tl(ret, r1);
> +    } else if (shift_count == -32) {
> +        /* fill ret completly with sign bit */
> +        tcg_gen_sari_tl(ret, r1, 31);
> +        /* clear PSW.V */
> +        tcg_gen_movi_tl(cpu_PSW_V, 0);

You've forgotten to set C here.
I think it's just

  tcg_gen_mov_tl(cpu_PSW_C, r1);

Of course, you need to do that before writing to ret.

> +    } else if (shift_count > 0) {
> +        TCGv t_max = tcg_const_i32(0x7FFFFFFF >> shift_count);
> +        TCGv t_min = tcg_const_i32(((int32_t)(-0x80000000)) >> shift_count);
> +
> +        /* calc carry */
> +        msk_start = 32 - shift_count;
> +        msk = ((1 << shift_count) - 1) << msk_start;
> +        tcg_gen_andi_tl(cpu_PSW_C, r1, msk);
> +        /* calc v/sv bits */
> +        tcg_gen_setcond_tl(TCG_COND_GT, temp, r1, t_max);
> +        tcg_gen_setcond_tl(TCG_COND_LT, temp2, r1, t_min);
> +        tcg_gen_or_tl(cpu_PSW_V, temp, temp2);
> +        tcg_gen_shli_tl(cpu_PSW_V, cpu_PSW_V, 31);
> +        /* calc sv */
> +        tcg_gen_or_tl(cpu_PSW_SV, cpu_PSW_V, cpu_PSW_SV);
> +        /* do shift */
> +        tcg_gen_shli_tl(ret, r1, shift_count);
> +
> +        tcg_temp_free(t_max);
> +        tcg_temp_free(t_min);
> +    } else {
> +        /* clear PSW.V */
> +        tcg_gen_movi_tl(cpu_PSW_V, 0);
> +        /* calc carry */
> +        msk = (1 << (-shift_count)) - 1;
> +        tcg_gen_andi_tl(cpu_PSW_C, r1, msk);
> +        /* do shift */
> +        tcg_gen_sari_tl(ret, r1, -(shift_count));
> +    }

Please avoid useless parenthesis, like -(x) and (-x).


r~