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[Qemu-devel] [PATCH 1/2] apb: add implementation of UltraSPARC IIi PCI T
From: |
Mark Cave-Ayland |
Subject: |
[Qemu-devel] [PATCH 1/2] apb: add implementation of UltraSPARC IIi PCI TAS register |
Date: |
Mon, 25 Aug 2014 18:58:19 +0100 |
FreeBSD SPARC64 checks the value of this register on boot in order to calculate
the DVMA base address.
Signed-off-by: Mark Cave-Ayland <address@hidden>
---
hw/pci-host/apb.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c
index 60bd81e..3b7fb13 100644
--- a/hw/pci-host/apb.c
+++ b/hw/pci-host/apb.c
@@ -68,6 +68,11 @@ do { printf("IOMMU: " fmt , ## __VA_ARGS__); } while (0)
#define PBM_PCI_IMR_MASK 0x7fffffff
#define PBM_PCI_IMR_ENABLED 0x80000000
+/* PCI Target Address Space Register (see UltraSPARC IIi User's Manual
+ section 19.3.0.4) */
+#define PBM_PCI_TARGET_AS 0x2028
+#define PBM_PCI_TARGET_AS_CD_ENABLE 0x40
+
#define POR (1U << 31)
#define SOFT_POR (1U << 30)
#define SOFT_XIR (1U << 29)
@@ -731,6 +736,12 @@ static void pci_pbm_reset(DeviceState *d)
s->irq_request = NO_IRQ_REQUEST;
s->pci_irq_in = 0ULL;
+ /* Set target address space register to base 0xc0000000, size 0x20000000
+ to match OpenBIOS virtual-dma properties */
+ s->pci_control[((PBM_PCI_TARGET_AS & 0x3f) >> 2)] = 0x0;
+ s->pci_control[((PBM_PCI_TARGET_AS & 0x3f) >> 2) + 1] =
+ PBM_PCI_TARGET_AS_CD_ENABLE;
+
if (s->nr_resets++ == 0) {
/* Power on reset */
s->reset_control = POR;
--
1.7.10.4