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Re: [Qemu-devel] [PATCH v3 3/4] serial: update LSR on enabling/disabling
From: |
Paolo Bonzini |
Subject: |
Re: [Qemu-devel] [PATCH v3 3/4] serial: update LSR on enabling/disabling FIFOs |
Date: |
Mon, 15 Dec 2014 16:52:37 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.3.0 |
On 15/12/2014 16:50, Dr. David Alan Gilbert wrote:
>> >
>> > if (val & UART_FCR_XFR) {
>> > + s->lsr |= UART_LSR_THRE;
>> > + s->thr_ipending = 1;
>> > fifo8_reset(&s->xmit_fifo);
>> > }
> Doesn't that break the assertion you added in patch 2?
> i.e. if I write a character, but it can't be sent, so it's added
> to the tsr_retry, but before the callback I set FCR_XFR, and that
> now sets LSR_THRE, then the callback triggers and it hits the
> assert?
You're right. The TEMT assertion is okay, but the THRE assertion should
be inside if (s->tsr_retry <= 0).
Paolo
- Re: [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, (continued)
- Re: [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Paolo Bonzini, 2014/12/15
- Re: [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Dr. David Alan Gilbert, 2014/12/15
- Re: [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Paolo Bonzini, 2014/12/15
- Re: [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Dr. David Alan Gilbert, 2014/12/15
- Re: [Qemu-devel] [PATCH v3 1/4] serial: reset thri_pending on IER writes with THRI=0, Paolo Bonzini, 2014/12/15
[Qemu-devel] [PATCH v3 4/4] serial: only resample THR interrupt on rising edge of IER.THRI, Paolo Bonzini, 2014/12/12
[Qemu-devel] [PATCH v3 3/4] serial: update LSR on enabling/disabling FIFOs, Paolo Bonzini, 2014/12/12
[Qemu-devel] [PATCH v3 2/4] serial: clean up THRE/TEMT handling, Paolo Bonzini, 2014/12/12