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[Qemu-devel] [PULL 02/30] target-mips: Make CP1.FIR read-only here too
From: |
Leon Alrae |
Subject: |
[Qemu-devel] [PULL 02/30] target-mips: Make CP1.FIR read-only here too |
Date: |
Tue, 16 Dec 2014 19:48:48 +0000 |
From: "Maciej W. Rozycki" <address@hidden>
CP1.FIR is read-only in hardware so gdbstub must respect it. We already
respect it for CTC1 instructions, so do it here too.
Signed-off-by: Maciej W. Rozycki <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
---
target-mips/gdbstub.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-mips/gdbstub.c b/target-mips/gdbstub.c
index 7e3a604..e86df0e 100644
--- a/target-mips/gdbstub.c
+++ b/target-mips/gdbstub.c
@@ -105,7 +105,7 @@ int mips_cpu_gdb_write_register(CPUState *cs, uint8_t
*mem_buf, int n)
RESTORE_ROUNDING_MODE;
break;
case 71:
- env->active_fpu.fcr0 = tmp;
+ /* FIR is read-only. Ignore writes. */
break;
}
return sizeof(target_ulong);
--
2.1.0
- [Qemu-devel] [PULL 00/30] target-mips queue, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 01/30] target-mips: Correct the handling of register #72 on writes, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 02/30] target-mips: Make CP1.FIR read-only here too,
Leon Alrae <=
- [Qemu-devel] [PULL 03/30] target-mips: Add 5KEc and 5KEf MIPS64r2 processors, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 09/30] target-mips: Fix formatting in `decode_opc', Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 10/30] target-mips: Make `helper_float_cvtw_s' consistent with the remaining helpers, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 11/30] target-mips: Remove unused `FLOAT_OP' macro, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 13/30] target-mips: Correct MIPS16/microMIPS branch size calculation, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 17/30] target-mips: Output CP0.Config2-5 in the register dump, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 14/30] target-mips: Correct the handling of writes to CP0.Status for MIPSr6, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 15/30] target-mips: Correct the writes to Status and Cause registers via gdbstub, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 12/30] target-mips: Restore the order of helpers, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 16/30] target-mips: Fix the 64-bit case for microMIPS MOVE16 and MOVEP, Leon Alrae, 2014/12/16