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Re: [Qemu-devel] [PATCH 9/9] target-ppc: Introduce Privileged TM Noops
From: |
Fam Zheng |
Subject: |
Re: [Qemu-devel] [PATCH 9/9] target-ppc: Introduce Privileged TM Noops |
Date: |
Fri, 19 Dec 2014 18:20:10 +0800 |
User-agent: |
Mutt/1.5.23 (2014-03-12) |
On Thu, 12/18 10:34, Tom Musta wrote:
> Add the supervisory Transactional Memory instructions treclaim. and
> trechkpt. The implementation is a degenerate one that simply
> checks privileged state, TM availability and then sets CR[0] to
> 0b0000, just like the unprivileged noops.
And also s-o-b for this :)
Fam
> ---
> target-ppc/translate.c | 38 ++++++++++++++++++++++++++++++++++++++
> 1 files changed, 38 insertions(+), 0 deletions(-)
>
> diff --git a/target-ppc/translate.c b/target-ppc/translate.c
> index a3c79a6..b4a4297 100644
> --- a/target-ppc/translate.c
> +++ b/target-ppc/translate.c
> @@ -9691,6 +9691,40 @@ static void gen_tcheck(DisasContext *ctx)
> tcg_gen_movi_i32(cpu_crf[crfD(ctx->opcode)], 0x8);
> }
>
> +#if defined(CONFIG_USER_ONLY)
> +#define GEN_TM_PRIV_NOOP(name) \
> +static inline void gen_##name(DisasContext *ctx) \
> +{ \
> + gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); \
> +}
> +
> +#else
> +
> +#define GEN_TM_PRIV_NOOP(name) \
> +static inline void gen_##name(DisasContext *ctx) \
> +{ \
> + if (unlikely(ctx->pr)) { \
> + gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); \
> + return; \
> + } \
> + if (unlikely(!ctx->tm_enabled)) { \
> + gen_exception_err(ctx, POWERPC_EXCP_FU, FSCR_IC_TM); \
> + return; \
> + } \
> + /* Because tbegin always fails, the implementation is \
> + * simple: \
> + * \
> + * CR[0] = 0b0 || MSR[TS] || 0b0 \
> + * = 0b0 || 0b00 | 0b0 \
> + */ \
> + tcg_gen_movi_i32(cpu_crf[0], 0); \
> +}
> +
> +#endif
> +
> +GEN_TM_PRIV_NOOP(treclaim);
> +GEN_TM_PRIV_NOOP(trechkpt);
> +
> static opcode_t opcodes[] = {
> GEN_HANDLER(invalid, 0x00, 0x00, 0x00, 0xFFFFFFFF, PPC_NONE),
> GEN_HANDLER(cmp, 0x1F, 0x00, 0x00, 0x00400000, PPC_INTEGER),
> @@ -11122,6 +11156,10 @@ GEN_HANDLER2_E(tsr, "tsr", 0x1F, 0x0E, 0x17,
> 0x03DFF800, \
> PPC_NONE, PPC2_TM),
> GEN_HANDLER2_E(tcheck, "tcheck", 0x1F, 0x0E, 0x16, 0x007FF800, \
> PPC_NONE, PPC2_TM),
> +GEN_HANDLER2_E(treclaim, "treclaim", 0x1F, 0x0E, 0x1D, 0x03E0F800, \
> + PPC_NONE, PPC2_TM),
> +GEN_HANDLER2_E(trechkpt, "trechkpt", 0x1F, 0x0E, 0x1F, 0x03FFF800, \
> + PPC_NONE, PPC2_TM),
> };
>
> #include "helper_regs.h"
> --
> 1.7.1
>
>
- [Qemu-devel] [PATCH 2/9] target-ppc: Introduce Feature Flag for Transactional Memory, (continued)
[Qemu-devel] [PATCH 6/9] target-ppc: Introduce tbegin, Tom Musta, 2014/12/18
[Qemu-devel] [PATCH 7/9] target-ppc: Introduce TM Noops, Tom Musta, 2014/12/18
[Qemu-devel] [PATCH 8/9] target-ppc: Introduce tcheck, Tom Musta, 2014/12/18
[Qemu-devel] [PATCH 9/9] target-ppc: Introduce Privileged TM Noops, Tom Musta, 2014/12/18
- Re: [Qemu-devel] [PATCH 9/9] target-ppc: Introduce Privileged TM Noops,
Fam Zheng <=
Re: [Qemu-devel] [PATCH 0/9] target-ppc: Rudimentary Support for Transactional Memory, Alexander Graf, 2014/12/18