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[Qemu-devel] [PULL 19/31] target-arm: Disable EL3 on unsupported machine
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 19/31] target-arm: Disable EL3 on unsupported machines |
Date: |
Tue, 23 Dec 2014 13:54:15 +0000 |
From: Greg Bellows <address@hidden>
Disables the CPU ARM_FEATURE_EL3 featuere on machine models that can be
configured to use Cortex-A9, Cortex-A15, and ARM1176 but don't officially
support EL3. This preserves backwards compatibility.
Signed-off-by: Greg Bellows <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/exynos4210.c | 11 +++++++++++
hw/arm/highbank.c | 12 ++++++++++++
hw/arm/integratorcp.c | 12 ++++++++++++
hw/arm/realview.c | 12 ++++++++++++
hw/arm/versatilepb.c | 12 ++++++++++++
hw/arm/xilinx_zynq.c | 12 ++++++++++++
6 files changed, 71 insertions(+)
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index 582794c..97dafca 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -152,6 +152,17 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
Object *cpuobj = object_new(object_class_get_name(cpu_oc));
Error *err = NULL;
+ /* By default A9 CPUs have EL3 enabled. This board does not currently
+ * support EL3 so the CPU EL3 property is disabled before realization.
+ */
+ if (object_property_find(cpuobj, "has_el3", NULL)) {
+ object_property_set_bool(cpuobj, false, "has_el3", &err);
+ if (err) {
+ error_report("%s", error_get_pretty(err));
+ exit(1);
+ }
+ }
+
s->cpu[n] = ARM_CPU(cpuobj);
object_property_set_int(cpuobj, EXYNOS4210_SMP_PRIVATE_BASE_ADDR,
"reset-cbar", &error_abort);
diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
index 30f744a..f67570a 100644
--- a/hw/arm/highbank.c
+++ b/hw/arm/highbank.c
@@ -241,6 +241,18 @@ static void calxeda_init(MachineState *machine, enum
cxmachines machine_id)
cpuobj = object_new(object_class_get_name(oc));
cpu = ARM_CPU(cpuobj);
+ /* By default A9 and A15 CPUs have EL3 enabled. This board does not
+ * currently support EL3 so the CPU EL3 property is disabled before
+ * realization.
+ */
+ if (object_property_find(cpuobj, "has_el3", NULL)) {
+ object_property_set_bool(cpuobj, false, "has_el3", &err);
+ if (err) {
+ error_report("%s", error_get_pretty(err));
+ exit(1);
+ }
+ }
+
if (object_property_find(cpuobj, "reset-cbar", NULL)) {
object_property_set_int(cpuobj, MPCORE_PERIPHBASE,
"reset-cbar", &error_abort);
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index f196189..8c48b68 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -493,6 +493,18 @@ static void integratorcp_init(MachineState *machine)
cpuobj = object_new(object_class_get_name(cpu_oc));
+ /* By default ARM1176 CPUs have EL3 enabled. This board does not
+ * currently support EL3 so the CPU EL3 property is disabled before
+ * realization.
+ */
+ if (object_property_find(cpuobj, "has_el3", NULL)) {
+ object_property_set_bool(cpuobj, false, "has_el3", &err);
+ if (err) {
+ error_report("%s", error_get_pretty(err));
+ exit(1);
+ }
+ }
+
object_property_set_bool(cpuobj, true, "realized", &err);
if (err) {
error_report("%s", error_get_pretty(err));
diff --git a/hw/arm/realview.c b/hw/arm/realview.c
index d41ec97..66e51ef 100644
--- a/hw/arm/realview.c
+++ b/hw/arm/realview.c
@@ -101,6 +101,18 @@ static void realview_init(MachineState *machine,
Object *cpuobj = object_new(object_class_get_name(cpu_oc));
Error *err = NULL;
+ /* By default A9,A15 and ARM1176 CPUs have EL3 enabled. This board
+ * does not currently support EL3 so the CPU EL3 property is disabled
+ * before realization.
+ */
+ if (object_property_find(cpuobj, "has_el3", NULL)) {
+ object_property_set_bool(cpuobj, false, "has_el3", &err);
+ if (err) {
+ error_report("%s", error_get_pretty(err));
+ exit(1);
+ }
+ }
+
if (is_pb && is_mpcore) {
object_property_set_int(cpuobj, periphbase, "reset-cbar", &err);
if (err) {
diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
index b74dc15..6c4c2e7 100644
--- a/hw/arm/versatilepb.c
+++ b/hw/arm/versatilepb.c
@@ -206,6 +206,18 @@ static void versatile_init(MachineState *machine, int
board_id)
cpuobj = object_new(object_class_get_name(cpu_oc));
+ /* By default ARM1176 CPUs have EL3 enabled. This board does not
+ * currently support EL3 so the CPU EL3 property is disabled before
+ * realization.
+ */
+ if (object_property_find(cpuobj, "has_el3", NULL)) {
+ object_property_set_bool(cpuobj, false, "has_el3", &err);
+ if (err) {
+ error_report("%s", error_get_pretty(err));
+ exit(1);
+ }
+ }
+
object_property_set_bool(cpuobj, true, "realized", &err);
if (err) {
error_report("%s", error_get_pretty(err));
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index b590392..06e6e24 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -126,6 +126,18 @@ static void zynq_init(MachineState *machine)
cpu = ARM_CPU(object_new(object_class_get_name(cpu_oc)));
+ /* By default A9 CPUs have EL3 enabled. This board does not
+ * currently support EL3 so the CPU EL3 property is disabled before
+ * realization.
+ */
+ if (object_property_find(OBJECT(cpu), "has_el3", NULL)) {
+ object_property_set_bool(OBJECT(cpu), false, "has_el3", &err);
+ if (err) {
+ error_report("%s", error_get_pretty(err));
+ exit(1);
+ }
+ }
+
object_property_set_int(OBJECT(cpu), ZYNQ_BOARD_MIDR, "midr", &err);
if (err) {
error_report("%s", error_get_pretty(err));
--
1.9.1
- [Qemu-devel] [PULL 01/31] audio: Don't free hw resources until after hw backend is stopped, (continued)
- [Qemu-devel] [PULL 01/31] audio: Don't free hw resources until after hw backend is stopped, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 09/31] target-arm: Add vexpress machine secure property, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 02/31] target-arm: Merge EL3 CP15 register lists, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 27/31] fw_cfg_mem: expose the "data_width" property with fw_cfg_init_mem_wide(), Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 29/31] hw/loader: split out load_image_gzipped_buffer(), Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 24/31] fw_cfg_mem: flip ctl_mem_ops and data_mem_ops to DEVICE_BIG_ENDIAN, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 22/31] fw_cfg: move boards to fw_cfg_init_io() / fw_cfg_init_mem(), Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 18/31] target-arm: Breakout integratorcp and versatilepb cpu init, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 16/31] target-arm: Enable CPU has_el3 prop during VE init, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 07/31] target-arm: Add vexpress a9 & a15 machine objects, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 19/31] target-arm: Disable EL3 on unsupported machines,
Peter Maydell <=
- [Qemu-devel] [PULL 06/31] target-arm: Add vexpress class and machine types, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 11/31] target-arm: Add virt class and machine types, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 05/31] vl.c: add HMP help to machine, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 04/31] vl.c: simplified machine_set_property, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 21/31] fw_cfg: hard separation between the MMIO and I/O port mappings, Peter Maydell, 2014/12/23
- Re: [Qemu-devel] [PULL 00/31] target-arm queue, Peter Maydell, 2014/12/23