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From: | Richard Henderson |
Subject: | Re: [Qemu-devel] [PATCH v3 2/2] target-mips: Misaligned memory accesses for MSA |
Date: | Thu, 14 May 2015 11:44:54 -0700 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 |
On 05/14/2015 02:46 AM, Yongbok Kim wrote: > In addition to that, if we issue all the loads let say only the first page is > accessible, in the architectural point of view it would be fine as nothing > will > be stored in the vector register but accessing the first page is "visible" > from > the data bus. > Do you think this wouldn't cause any problem? > It might be just implementation dependent though. I don't think it would cause a problem unless the user is silly enough to issue an MSA read to device memory. r~
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