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[Qemu-devel] [PULL 20/21] target-arm: Correct accessfn for CNTV_TVAL_EL0
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 20/21] target-arm: Correct accessfn for CNTV_TVAL_EL0 |
Date: |
Mon, 18 May 2015 20:15:20 +0100 |
From: "Edgar E. Iglesias" <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index b6d2310..21b4531 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -1364,6 +1364,7 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = {
{ .name = "CNTV_TVAL_EL0", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 3, .crn = 14, .crm = 3, .opc2 = 0,
.type = ARM_CP_NO_RAW | ARM_CP_IO, .access = PL1_RW | PL0_R,
+ .accessfn = gt_vtimer_access,
.readfn = gt_tval_read, .writefn = gt_tval_write,
},
/* The counter itself */
--
1.9.1
- [Qemu-devel] [PULL 00/21] target-arm queue, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 02/21] target-arm: cpu64: Add support for Cortex-A53, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 21/21] target-arm: Remove unneeded '+', Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 19/21] target-arm: Correct accessfn for CNTP_{CT}VAL_EL0, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 18/21] target-arm: Add WFx syndrome function, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 17/21] target-arm: Add EL3 and EL2 TCR checking, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 15/21] linux-user/arm: Correct TARGET_NR_timerfd to TARGET_NR_timerfd_create, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 20/21] target-arm: Correct accessfn for CNTV_TVAL_EL0,
Peter Maydell <=
- [Qemu-devel] [PULL 14/21] arm: xlnx-ep108: Add bootloading, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 12/21] arm: Add xlnx-ep108 machine, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 11/21] arm: xlnx-zynqmp: Add UART support, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 10/21] char: cadence_uart: Split state struct and type into header, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 16/21] target-arm: Add TTBR regime function and use, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 09/21] char: cadence_uart: Clean up variable names, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 13/21] arm: xlnx-ep108: Add external RAM, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 08/21] arm: xlnx-zynqmp: Add GEM support, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 04/21] arm: xlnx-zynqmp: Add GIC, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 01/21] target-arm: cpu64: generalise name of A57 regs, Peter Maydell, 2015/05/18