Re: [Qemu-devel] [PATCH 5/7] tcg/mips: Support r6 multiply/divide encodings

[James Hogan]

On Thu, Oct 01, 2015 at 09:24:17AM +1000, Richard Henderson wrote:
> On 10/01/2015 01:30 AM, James Hogan wrote:
> >       case INDEX_op_mul_i32:
> > +        if (use_mips32r6_instructions) {
> > +            tcg_out_opc_reg(s, OPC_MUL_R6, a0, a1, a2);
> > +            break;
> > +        }
> >           if (use_mips32_instructions) {
> >               tcg_out_opc_reg(s, OPC_MUL, a0, a1, a2);
> >               break;
> 
> I wonder if it's worth defining a common OPC_MUL as you did with OPC_JR.

Yes, probably would make sense for these changed instruction encodings
(rather than new instructions).

> Also, these columns aren't lining up.  Did you use tabs?

Whitespace looks okay to me. Has your email client changed it?

Thanks
James

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