[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 17/19] target-tilegx: Implement v2mults instruction
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 17/19] target-tilegx: Implement v2mults instruction |
Date: |
Wed, 7 Oct 2015 20:33:15 +1100 |
From: Chen Gang <address@hidden>
Signed-off-by: Chen Gang <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target-tilegx/helper.h | 1 +
target-tilegx/simd_helper.c | 15 +++++++++++++++
target-tilegx/translate.c | 4 ++++
3 files changed, 20 insertions(+)
diff --git a/target-tilegx/helper.h b/target-tilegx/helper.h
index c58ee20..bbcc476 100644
--- a/target-tilegx/helper.h
+++ b/target-tilegx/helper.h
@@ -16,6 +16,7 @@ DEF_HELPER_FLAGS_2(v2int_h, TCG_CALL_NO_RWG_SE, i64, i64, i64)
DEF_HELPER_FLAGS_2(v2int_l, TCG_CALL_NO_RWG_SE, i64, i64, i64)
DEF_HELPER_FLAGS_2(v1multu, TCG_CALL_NO_RWG_SE, i64, i64, i64)
+DEF_HELPER_FLAGS_2(v2mults, TCG_CALL_NO_RWG_SE, i64, i64, i64)
DEF_HELPER_FLAGS_2(v1shl, TCG_CALL_NO_RWG_SE, i64, i64, i64)
DEF_HELPER_FLAGS_2(v1shru, TCG_CALL_NO_RWG_SE, i64, i64, i64)
DEF_HELPER_FLAGS_2(v1shrs, TCG_CALL_NO_RWG_SE, i64, i64, i64)
diff --git a/target-tilegx/simd_helper.c b/target-tilegx/simd_helper.c
index d294671..6d7bb5c 100644
--- a/target-tilegx/simd_helper.c
+++ b/target-tilegx/simd_helper.c
@@ -41,6 +41,21 @@ uint64_t helper_v1multu(uint64_t a, uint64_t b)
return r;
}
+uint64_t helper_v2mults(uint64_t a, uint64_t b)
+{
+ uint64_t r = 0;
+ int i;
+
+ /* While the instruction talks about signed inputs, with a
+ truncated result the sign of the inputs doesn't matter. */
+ for (i = 0; i < 64; i += 16) {
+ unsigned ae = extract64(a, i, 16);
+ unsigned be = extract64(b, i, 16);
+ r = deposit64(r, i, 16, ae * be);
+ }
+ return r;
+}
+
uint64_t helper_v1shl(uint64_t a, uint64_t b)
{
uint64_t m;
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 034cbc2..eb2d0b1 100644
--- a/target-tilegx/translate.c
+++ b/target-tilegx/translate.c
@@ -1355,7 +1355,11 @@ static TileExcp gen_rrr_opcode(DisasContext *dc,
unsigned opext,
case OE_RRR(V2MNZ, 0, X1):
case OE_RRR(V2MULFSC, 0, X0):
case OE_RRR(V2MULS, 0, X0):
+ return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
case OE_RRR(V2MULTS, 0, X0):
+ gen_helper_v2mults(tdest, tsrca, tsrcb);
+ mnemonic = "v2mults";
+ break;
case OE_RRR(V2MZ, 0, X0):
case OE_RRR(V2MZ, 0, X1):
case OE_RRR(V2PACKH, 0, X0):
--
2.4.3
- [Qemu-devel] [PULL 12/19] target-tilegx: Use TILEGX_EXCP_SIGNAL instead of TILEGX_EXCP_SEGV, (continued)
- [Qemu-devel] [PULL 12/19] target-tilegx: Use TILEGX_EXCP_SIGNAL instead of TILEGX_EXCP_SEGV, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 01/19] target-tilegx: Tidy simd_helper.c, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 06/19] target-tilegx: Implement table index instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 13/19] target-tilegx: Fix a typo for mnemonic about "ld_add", Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 15/19] target-tilegx: Implement v2sh* instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 16/19] target-tilegx: Implement v?int_* instructions., Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 03/19] target-tilegx: Implement v*add and v*sub instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 05/19] target-tilegx: Implement crc instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 11/19] target-tilegx: Decode ill pseudo-instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 18/19] target-tilegx: Use TILEGX_EXCP_OPCODE_UNKNOWN and TILEGX_EXCP_OPCODE_UNIMPLEMENTED correctly, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 17/19] target-tilegx: Implement v2mults instruction,
Richard Henderson <=
- Re: [Qemu-devel] [PULL 00/19] Collected tilegx patches, Peter Maydell, 2015/10/08