[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 3/3] i.MX: Add SPI controllers to i.MX6 SOC
From: |
Jean-Christophe Dubois |
Subject: |
[Qemu-devel] [PATCH 3/3] i.MX: Add SPI controllers to i.MX6 SOC |
Date: |
Sat, 13 Feb 2016 17:06:53 +0100 |
This allows Linux to boot without hanging on SPI access.
Signed-off-by: Jean-Christophe Dubois <address@hidden>
---
hw/arm/fsl-imx6.c | 32 ++++++++++++++++++++++++++++++++
include/hw/arm/fsl-imx6.h | 3 +++
2 files changed, 35 insertions(+)
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index 0faae27..c5c8fdc 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -78,6 +78,11 @@ static void fsl_imx6_init(Object *obj)
object_initialize(&s->esdhc[i], sizeof(s->esdhc[i]),
TYPE_SYSBUS_SDHCI);
qdev_set_parent_bus(DEVICE(&s->esdhc[i]), sysbus_get_default());
}
+
+ for (i = 0; i < FSL_IMX6_NUM_ECSPIS; i++) {
+ object_initialize(&s->spi[i], sizeof(s->spi[i]), TYPE_IMX_SPI);
+ qdev_set_parent_bus(DEVICE(&s->spi[i]), sysbus_get_default());
+ }
}
static void fsl_imx6_realize(DeviceState *dev, Error **errp)
@@ -339,6 +344,33 @@ static void fsl_imx6_realize(DeviceState *dev, Error
**errp)
esdhc_table[i].irq));
}
+ /* Initialize all ECSPI */
+ for (i = 0; i < FSL_IMX6_NUM_ECSPIS; i++) {
+ static const struct {
+ hwaddr addr;
+ unsigned int irq;
+ } spi_table[FSL_IMX6_NUM_ECSPIS] = {
+ { FSL_IMX6_eCSPI1_ADDR, FSL_IMX6_ECSPI1_IRQ },
+ { FSL_IMX6_eCSPI2_ADDR, FSL_IMX6_ECSPI2_IRQ },
+ { FSL_IMX6_eCSPI3_ADDR, FSL_IMX6_ECSPI3_IRQ },
+ { FSL_IMX6_eCSPI4_ADDR, FSL_IMX6_ECSPI4_IRQ },
+ { FSL_IMX6_eCSPI5_ADDR, FSL_IMX6_ECSPI5_IRQ },
+ };
+
+ /* Initialize the SPI */
+ object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ /* Map SPI memory */
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, spi_table[i].addr);
+ /* Connect SPI IRQ to PIC */
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0,
+ qdev_get_gpio_in(DEVICE(&s->a9mpcore),
+ spi_table[i].irq));
+ }
+
/* ROM memory */
memory_region_init_rom_device(&s->rom, NULL, NULL, NULL, "imx6.rom",
FSL_IMX6_ROM_SIZE, &err);
diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h
index 301812d..d24aaee 100644
--- a/include/hw/arm/fsl-imx6.h
+++ b/include/hw/arm/fsl-imx6.h
@@ -27,6 +27,7 @@
#include "hw/i2c/imx_i2c.h"
#include "hw/gpio/imx_gpio.h"
#include "hw/sd/sdhci.h"
+#include "hw/ssi/imx_spi.h"
#include "exec/memory.h"
#define TYPE_FSL_IMX6 "fsl,imx6"
@@ -38,6 +39,7 @@
#define FSL_IMX6_NUM_I2CS 3
#define FSL_IMX6_NUM_GPIOS 7
#define FSL_IMX6_NUM_ESDHCS 4
+#define FSL_IMX6_NUM_ECSPIS 5
typedef struct FslIMX6State {
/*< private >*/
@@ -54,6 +56,7 @@ typedef struct FslIMX6State {
IMXI2CState i2c[FSL_IMX6_NUM_I2CS];
IMXGPIOState gpio[FSL_IMX6_NUM_GPIOS];
SDHCIState esdhc[FSL_IMX6_NUM_ESDHCS];
+ IMXSPIState spi[FSL_IMX6_NUM_ECSPIS];
MemoryRegion rom;
MemoryRegion caam;
MemoryRegion ocram;
--
2.5.0
- [Qemu-devel] [PATCH 0/3] Add support for i.MX SPI Controller, Jean-Christophe Dubois, 2016/02/13
- [Qemu-devel] [PATCH 1/3] FIFO: Add a FIFO32 implementation, Jean-Christophe Dubois, 2016/02/13
- [Qemu-devel] [PATCH 2/3] i.MX: Add the Freescale SPI Controller, Jean-Christophe Dubois, 2016/02/13
- Re: [Qemu-devel] [PATCH 2/3] i.MX: Add the Freescale SPI Controller, mar.krzeminski, 2016/02/14
- Re: [Qemu-devel] [PATCH 2/3] i.MX: Add the Freescale SPI Controller, Jean-Christophe DUBOIS, 2016/02/14
- Re: [Qemu-devel] [PATCH 2/3] i.MX: Add the Freescale SPI Controller, mar.krzeminski, 2016/02/14
- Re: [Qemu-devel] [PATCH 2/3] i.MX: Add the Freescale SPI Controller, Jean-Christophe DUBOIS, 2016/02/15
- Re: [Qemu-devel] [PATCH 2/3] i.MX: Add the Freescale SPI Controller, mar.krzeminski, 2016/02/15
- Re: [Qemu-devel] [PATCH 2/3] i.MX: Add the Freescale SPI Controller, Jean-Christophe DUBOIS, 2016/02/15
- Re: [Qemu-devel] [PATCH 2/3] i.MX: Add the Freescale SPI Controller, mar.krzeminski, 2016/02/16
[Qemu-devel] [PATCH 3/3] i.MX: Add SPI controllers to i.MX6 SOC,
Jean-Christophe Dubois <=