[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 05/11] target-arm: In cpsr_write() ignore mode switc
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 05/11] target-arm: In cpsr_write() ignore mode switches from User mode |
Date: |
Mon, 15 Feb 2016 17:22:51 +0000 |
The only case where we can attempt a cpsr_write() mode switch from
User is from the gdbstub; all other cases are handled in the
calling code (notably translate.c). Architecturally attempts to
alter the mode bits from user mode are simply ignored (and not
treated as a bad mode switch, which in v8 sets CPSR.IL). Make
mode switches from User ignored in cpsr_write() as well, for
consistency.
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index d1919bb..9998a25 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -5282,6 +5282,7 @@ void cpsr_write(CPUARMState *env, uint32_t val, uint32_t
mask,
env->daif |= val & CPSR_AIF & mask;
if (write_type != CPSRWriteRaw &&
+ (env->uncached_cpsr & CPSR_M) != CPSR_USER &&
((env->uncached_cpsr ^ val) & mask & CPSR_M)) {
if (bad_mode_switch(env, val & CPSR_M)) {
/* Attempt to switch to an invalid mode: this is UNPREDICTABLE.
--
1.9.1
- [Qemu-devel] [PATCH 11/11] target-arm: Make Monitor->NS PL1 mode changes illegal if HCR.TGE is 1, (continued)
- [Qemu-devel] [PATCH 11/11] target-arm: Make Monitor->NS PL1 mode changes illegal if HCR.TGE is 1, Peter Maydell, 2016/02/15
- [Qemu-devel] [PATCH 04/11] linux-user: Use restrictive mask when calling cpsr_write(), Peter Maydell, 2016/02/15
- [Qemu-devel] [PATCH 09/11] target-arm: In v8, make illegal AArch32 mode changes set PSTATE.IL, Peter Maydell, 2016/02/15
- [Qemu-devel] [PATCH 02/11] target-arm: Add write_type argument to cpsr_write(), Peter Maydell, 2016/02/15
- [Qemu-devel] [PATCH 07/11] target-arm: Add Hyp mode checks to bad_mode_switch(), Peter Maydell, 2016/02/15
- [Qemu-devel] [PATCH 05/11] target-arm: In cpsr_write() ignore mode switches from User mode,
Peter Maydell <=
- [Qemu-devel] [PATCH 01/11] target-arm: Give CPSR setting on 32-bit exception return its own helper, Peter Maydell, 2016/02/15
- [Qemu-devel] [PATCH 06/11] target-arm: Add comment about not implementing NSACR.RFR, Peter Maydell, 2016/02/15
- [Qemu-devel] [PATCH 10/11] target-arm: Make mode switches from Hyp via CPS and MRS illegal, Peter Maydell, 2016/02/15
- [Qemu-devel] [PATCH 03/11] target-arm: Raw CPSR writes should skip checks and bank switching, Peter Maydell, 2016/02/15