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[Qemu-devel] [PULL 03/36] target-arm: Implement MDCR_EL3.TDOSA and MDCR_
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 03/36] target-arm: Implement MDCR_EL3.TDOSA and MDCR_EL2.TDOSA traps |
Date: |
Thu, 18 Feb 2016 14:34:35 +0000 |
Implement the traps to EL2 and EL3 controlled by the bits
MDCR_EL2.TDOSA MDCR_EL3.TDOSA. These can configurably trap
accesses to the "powerdown debug" registers.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Sergey Fedorov <address@hidden>
---
target-arm/cpu.h | 12 ++++++++++++
target-arm/helper.c | 23 ++++++++++++++++++++++-
2 files changed, 34 insertions(+), 1 deletion(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index afbf366..77f9b51 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -595,6 +595,18 @@ void pmccntr_sync(CPUARMState *env);
#define CPTR_TTA (1U << 20)
#define CPTR_TFP (1U << 10)
+#define MDCR_EPMAD (1U << 21)
+#define MDCR_EDAD (1U << 20)
+#define MDCR_SPME (1U << 17)
+#define MDCR_SDD (1U << 16)
+#define MDCR_TDRA (1U << 11)
+#define MDCR_TDOSA (1U << 10)
+#define MDCR_TDA (1U << 9)
+#define MDCR_TDE (1U << 8)
+#define MDCR_HPME (1U << 7)
+#define MDCR_TPM (1U << 6)
+#define MDCR_TPMCR (1U << 5)
+
#define CPSR_M (0x1fU)
#define CPSR_T (1U << 5)
#define CPSR_F (1U << 6)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 4d27c00..b45d596 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -385,6 +385,24 @@ static CPAccessResult access_trap_aa32s_el1(CPUARMState
*env,
return CP_ACCESS_TRAP_UNCATEGORIZED;
}
+/* Check for traps to "powerdown debug" registers, which are controlled
+ * by MDCR.TDOSA
+ */
+static CPAccessResult access_tdosa(CPUARMState *env, const ARMCPRegInfo *ri,
+ bool isread)
+{
+ int el = arm_current_el(env);
+
+ if (el < 2 && (env->cp15.mdcr_el2 & MDCR_TDOSA)
+ && !arm_is_secure_below_el3(env)) {
+ return CP_ACCESS_TRAP_EL2;
+ }
+ if (el < 3 && (env->cp15.mdcr_el3 & MDCR_TDOSA)) {
+ return CP_ACCESS_TRAP_EL3;
+ }
+ return CP_ACCESS_OK;
+}
+
static void dacr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t
value)
{
ARMCPU *cpu = arm_env_get_cpu(env);
@@ -3778,15 +3796,18 @@ static const ARMCPRegInfo debug_cp_reginfo[] = {
{ .name = "OSLAR_EL1", .state = ARM_CP_STATE_BOTH,
.cp = 14, .opc0 = 2, .opc1 = 0, .crn = 1, .crm = 0, .opc2 = 4,
.access = PL1_W, .type = ARM_CP_NO_RAW,
+ .accessfn = access_tdosa,
.writefn = oslar_write },
{ .name = "OSLSR_EL1", .state = ARM_CP_STATE_BOTH,
.cp = 14, .opc0 = 2, .opc1 = 0, .crn = 1, .crm = 1, .opc2 = 4,
.access = PL1_R, .resetvalue = 10,
+ .accessfn = access_tdosa,
.fieldoffset = offsetof(CPUARMState, cp15.oslsr_el1) },
/* Dummy OSDLR_EL1: 32-bit Linux will read this */
{ .name = "OSDLR_EL1", .state = ARM_CP_STATE_BOTH,
.cp = 14, .opc0 = 2, .opc1 = 0, .crn = 1, .crm = 3, .opc2 = 4,
- .access = PL1_RW, .type = ARM_CP_NOP },
+ .access = PL1_RW, .accessfn = access_tdosa,
+ .type = ARM_CP_NOP },
/* Dummy DBGVCR: Linux wants to clear this on startup, but we don't
* implement vector catch debug events yet.
*/
--
1.9.1
- [Qemu-devel] [PULL 35/36] hw/timer: QOM'ify pl031, (continued)
- [Qemu-devel] [PULL 35/36] hw/timer: QOM'ify pl031, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 33/36] hw/timer: QOM'ify exynos4210_pwm, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 31/36] hw/timer: QOM'ify arm_timer (pass 2), Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 32/36] hw/timer: QOM'ify exynos4210_mct, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 29/36] hw/sd: use guest error logging rather than fprintf to stderr, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 26/36] hw/sd/pxa2xx_mmci: Add reset function, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 27/36] hw/sd: implement CMD23 (SET_BLOCK_COUNT) for MMC compatibility, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 18/36] hw/sd/sd.c: QOMify, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 15/36] ARM: PL061: Clear PL061 device state after reset, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 01/36] target-arm: correct CNTFRQ access rights, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 03/36] target-arm: Implement MDCR_EL3.TDOSA and MDCR_EL2.TDOSA traps,
Peter Maydell <=
- [Qemu-devel] [PULL 34/36] hw/timer: QOM'ify exynos4210_rtc, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 25/36] hw/sd/pxa2xx_mmci: Convert to VMStateDescription, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 06/36] target-arm: Report correct syndrome for FPEXC32_EL2 traps, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 22/36] sdhci_sysbus: Create SD card device in users, not the device itself, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 21/36] hw/sd/sdhci.c: Update to use SDBus APIs, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 20/36] hw/sd: Add QOM bus which SD cards plug in to, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 30/36] hw/timer: QOM'ify arm_timer (pass 1), Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 19/36] hw/sd/sd.c: Convert sd_reset() function into Device reset method, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 07/36] target-arm: Clean up trap/undef handling of SRS, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 09/36] target-arm: Move bank_number() into internals.h, Peter Maydell, 2016/02/18