[Qemu-devel] [PATCH] nvic: allow to set pending status for not active interrupts

[marcin.krzeminski]

From: Marcin Krzeminski <address@hidden>

According to ARM DUI 0552A 4.2.10. NVIC set pending status
also for disabled interrupts. This patch adds possibility
to emulate this in Qemu.

Signed-off-by: Marcin Krzeminski <address@hidden>
---
 hw/intc/arm_gic.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index b30cc91..85be6e4 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -147,7 +147,8 @@ static void gic_set_irq_11mpcore(GICState *s, int irq, int 
level,
 {
     if (level) {
         GIC_SET_LEVEL(irq, cm);
-        if (GIC_TEST_EDGE_TRIGGER(irq) || GIC_TEST_ENABLED(irq, cm)) {
+        if (GIC_TEST_EDGE_TRIGGER(irq) || GIC_TEST_ENABLED(irq, cm)
+                || (!GIC_TEST_ACTIVE(irq, cm) &&  s->revision == REV_NVIC)) {
             DPRINTF("Set %d pending mask %x\n", irq, target);
             GIC_SET_PENDING(irq, target);
         }
-- 
2.7.4