Re: [Qemu-devel] [PATCH 23/29] target-sparc: implement ST_BLKINIT_ ASIs

[Richard Henderson]

On 10/01/2016 05:05 AM, Artyom Tarasenko wrote:
> @@ -2234,13 +2234,24 @@ static void gen_st_asi(DisasContext *dc, TCGv src, TCGv 
> addr,
>      switch (da.type) {
>      case GET_ASI_EXCP:
>          break;
> -    case GET_ASI_DTWINX: /* Reserved for stda.  */
> -        gen_exception(dc, TT_ILL_INSN);
> -        break;
>      case GET_ASI_DIRECT:
>          gen_address_mask(dc, addr);
>          tcg_gen_qemu_st_tl(src, addr, da.mem_idx, da.memop);
>          break;
> +    case GET_ASI_DTWINX:
> +#ifndef TARGET_SPARC64
> +        gen_exception(dc, TT_ILL_INSN);
> +        break;
> +#else
> +        if (!(dc->def->features & CPU_FEATURE_HYPV)) {
> +            /* Pre OpenSPARC CPUs don't have these */
> +            gen_exception(dc, TT_ILL_INSN);
> +            return;
> +        }
> +        /* in OpenSPARC T1+ CPUs TWINX ASIs in store instructions
> +         * are ST_BLKINIT_ ASIs */
> +        /* fall through */
> +#endif
>      default:

Of course, "DTWINX" is short for "DIRECT TWINX", so you don't need to fall into 
the default case, but into the DIRECT case.

Indeed, built upon my patch set that would reach g_assert_not_reached, since I 
removed all the cases that are handled inline.


r~