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Re: [Qemu-devel] [PATCH v5 30/33] target-arm/cpu: don't reset TLB struct
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v5 30/33] target-arm/cpu: don't reset TLB structures, use cputlb to do it |
Date: |
Fri, 28 Oct 2016 10:07:34 +0100 |
On 28 October 2016 at 09:38, Alex Bennée <address@hidden> wrote:
>
> Richard Henderson <address@hidden> writes:
>> And don't we (or if not, shouldn't we)
>> handle the tlb_flush generically for reset?
>
> Probably. tlb_flush seems to be one of those things liberally sprinkled
> in the arch code for all sorts of things but certainly cpu_reset is one
> we could make the call from generic code.
I think the theory I formed last time I looked at it is that
if your CPU has no state which would require you to flush the
TLB when it changes, then there's no need to flush the TLB
on reset -- any entries still in the TLB from before reset are
still valid after reset. For ARM a CPU reset will reset state
like the ASID and the MMU-enabled bit which require a TLB flush
on change, so we have to call tlb_flush here.
You could argue that the set of CPUs which don't require a
tlb flush on reset are not worth trying to optimise for
like this and we should just do it generically.
thanks
-- PMM
- [Qemu-devel] [PATCH v5 15/33] tcg: rename tcg_current_cpu to tcg_current_rr_cpu, (continued)
- [Qemu-devel] [PATCH v5 15/33] tcg: rename tcg_current_cpu to tcg_current_rr_cpu, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 06/33] tcg: comment on which functions have to be called with tb_lock held, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 11/33] tcg: move tcg_exec_all and helpers above thread fn, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 27/33] cputlb: atomically update tlb fields used by tlb_reset_dirty, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 24/33] cputlb: add assert_cpu_is_self checks, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 25/33] cputlb: introduce tlb_flush_* async work., Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 31/33] target-arm: ensure BQL taken for ARM_CP_IO register access, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 30/33] target-arm/cpu: don't reset TLB structures, use cputlb to do it, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 19/33] tcg: move locking for tb_invalidate_phys_page_range up, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 21/33] tcg: enable thread-per-vCPU, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 33/33] tcg: enable MTTCG by default for ARM on x86 hosts, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 32/33] target-arm: helpers which may affect global state need the BQL, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 29/33] target-arm/powerctl: defer cpu reset work to CPU context, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 28/33] cputlb: make tlb_flush_by_mmuidx safe for MTTCG, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 26/33] cputlb: tweak qemu_ram_addr_from_host_nofail reporting, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 20/33] tcg: enable tb_lock() for SoftMMU, Alex Bennée, 2016/10/27
- [Qemu-devel] [PATCH v5 23/33] *_run_on_cpu: introduce run_on_cpu_data type, Alex Bennée, 2016/10/27