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| From: | Thomas Huth |
| Subject: | Re: [Qemu-devel] [PULL 26/36] hw/intc/arm_gicv3: Add accessors for ICH_ system registers |
| Date: | Thu, 26 Jan 2017 10:42:25 +0100 |
| User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.6.0 |
On 26.01.2017 10:35, Paolo Bonzini wrote:
>
>
> On 19/01/2017 15:09, Peter Maydell wrote:
>> + uint64_t lr = cs->ich_lr_el2[i];
>> +
>> + if ((lr & ICH_LR_EL2_STATE_MASK) == 0 &&
>> + ((lr & ICH_LR_EL2_HW) == 1 || (lr & ICH_LR_EL2_EOI) == 0)) {
>
> This should be "!= 0", not == 1 (reported by Coverity).
A patch for this issue is already on the mailing list - see "arm_gicv3:
Fix broken logic in ELRSR calculation"
Thomas
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