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[Qemu-devel] [PATCH risu 2/9] Abstract out getting and setting parameter
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH risu 2/9] Abstract out getting and setting parameter register |
Date: |
Fri, 24 Feb 2017 17:35:21 +0000 |
From: Peter Maydell <address@hidden>
The SETMEMBLOCK operation takes a parameter in a register,
and GETMEMBLOCK returns a result in a register. Abstract
these out into functions provided by the backend, so we
can use common code for send_register_info() and
recv_and_compare_register_info().
Signed-off-by: Peter Maydell <address@hidden>
---
risu.h | 11 +++++++++++
risu_aarch64.c | 19 +++++++++++++------
risu_arm.c | 20 ++++++++++++++------
risu_m68k.c | 19 +++++++++++++------
risu_ppc64le.c | 19 +++++++++++++------
5 files changed, 64 insertions(+), 24 deletions(-)
diff --git a/risu.h b/risu.h
index 26ed834..4f923b2 100644
--- a/risu.h
+++ b/risu.h
@@ -37,6 +37,8 @@ extern int test_fp_exc;
/* The memory block should be this long */
#define MEMBLOCKLEN 8192
+struct reginfo;
+
/* Interface provided by CPU-specific code: */
/* Send the register information from the struct ucontext down the socket.
@@ -63,4 +65,13 @@ int report_match_status(void);
*/
void advance_pc(void *uc);
+/* Set the parameter register in a ucontext_t to the specified value.
+ * (32-bit targets can ignore high 32 bits.)
+ * vuc is a ucontext_t* cast to void*.
+ */
+void set_ucontext_paramreg(void *vuc, uint64_t value);
+
+/* Return the value of the parameter register from a reginfo. */
+uint64_t get_reginfo_paramreg(struct reginfo *ri);
+
#endif /* RISU_H */
diff --git a/risu_aarch64.c b/risu_aarch64.c
index f150dcd..f13338d 100644
--- a/risu_aarch64.c
+++ b/risu_aarch64.c
@@ -30,10 +30,15 @@ void advance_pc(void *vuc)
uc->uc_mcontext.pc += 4;
}
-static void set_x0(void *vuc, uint64_t x0)
+void set_ucontext_paramreg(void *vuc, uint64_t value)
{
ucontext_t *uc = vuc;
- uc->uc_mcontext.regs[0] = x0;
+ uc->uc_mcontext.regs[0] = value;
+}
+
+uint64_t get_reginfo_paramreg(struct reginfo *ri)
+{
+ return ri->regs[0];
}
static int get_risuop(uint32_t insn)
@@ -63,10 +68,11 @@ int send_register_info(int sock, void *uc)
*/
return send_data_pkt(sock, &ri, sizeof(ri));
case OP_SETMEMBLOCK:
- memblock = (void *)ri.regs[0];
+ memblock = (void *)get_reginfo_paramreg(&ri);
break;
case OP_GETMEMBLOCK:
- set_x0(uc, ri.regs[0] + (uintptr_t)memblock);
+ set_ucontext_paramreg(uc,
+ get_reginfo_paramreg(&ri) + (uintptr_t)memblock);
break;
case OP_COMPAREMEM:
return send_data_pkt(sock, memblock, MEMBLOCKLEN);
@@ -111,10 +117,11 @@ int recv_and_compare_register_info(int sock, void *uc)
send_response_byte(sock, resp);
break;
case OP_SETMEMBLOCK:
- memblock = (void *)master_ri.regs[0];
+ memblock = (void *)get_reginfo_paramreg(&master_ri);
break;
case OP_GETMEMBLOCK:
- set_x0(uc, master_ri.regs[0] + (uintptr_t)memblock);
+ set_ucontext_paramreg(uc, get_reginfo_paramreg(&master_ri) +
+ (uintptr_t)memblock);
break;
case OP_COMPAREMEM:
mem_used = 1;
diff --git a/risu_arm.c b/risu_arm.c
index bdfb59b..c2b79a5 100644
--- a/risu_arm.c
+++ b/risu_arm.c
@@ -52,10 +52,16 @@ void advance_pc(void *vuc)
uc->uc_mcontext.arm_pc += insnsize(uc);
}
-static void set_r0(void *vuc, uint32_t r0)
+
+void set_ucontext_paramreg(void *vuc, uint64_t value)
{
ucontext_t *uc = vuc;
- uc->uc_mcontext.arm_r0 = r0;
+ uc->uc_mcontext.arm_r0 = value;
+}
+
+uint64_t get_reginfo_paramreg(struct reginfo *ri)
+{
+ return ri->gpreg[0];
}
static int get_risuop(uint32_t insn, int isz)
@@ -87,10 +93,11 @@ int send_register_info(int sock, void *uc)
*/
return send_data_pkt(sock, &ri, sizeof(ri));
case OP_SETMEMBLOCK:
- memblock = (void *)ri.gpreg[0];
+ memblock = (void *)(uintptr_t)get_reginfo_paramreg(&ri);
break;
case OP_GETMEMBLOCK:
- set_r0(uc, ri.gpreg[0] + (uintptr_t)memblock);
+ set_ucontext_paramreg(uc,
+ get_reginfo_paramreg(&ri) +
(uintptr_t)memblock);
break;
case OP_COMPAREMEM:
return send_data_pkt(sock, memblock, MEMBLOCKLEN);
@@ -139,10 +146,11 @@ int recv_and_compare_register_info(int sock, void *uc)
send_response_byte(sock, resp);
break;
case OP_SETMEMBLOCK:
- memblock = (void *)master_ri.gpreg[0];
+ memblock = (void *)(uintptr_t)get_reginfo_paramreg(&master_ri);
break;
case OP_GETMEMBLOCK:
- set_r0(uc, master_ri.gpreg[0] + (uintptr_t)memblock);
+ set_ucontext_paramreg(uc, get_reginfo_paramreg(&master_ri) +
+ (uintptr_t)memblock);
break;
case OP_COMPAREMEM:
mem_used = 1;
diff --git a/risu_m68k.c b/risu_m68k.c
index 15e30b1..feb3912 100644
--- a/risu_m68k.c
+++ b/risu_m68k.c
@@ -25,10 +25,15 @@ void advance_pc(void *vuc)
uc->uc_mcontext.gregs[R_PC] += 4;
}
-void set_a0(void *vuc, uint32_t a0)
+void set_ucontext_paramreg(void *vuc, uint64_t value)
{
ucontext_t *uc = vuc;
- uc->uc_mcontext.gregs[R_A0] = a0;
+ uc->uc_mcontext.gregs[R_A0] = value;
+}
+
+uint64_t get_reginfo_paramreg(struct reginfo *ri)
+{
+ return ri->gregs[R_A0];
}
static int get_risuop(uint32_t insn)
@@ -53,10 +58,11 @@ int send_register_info(int sock, void *uc)
default:
return send_data_pkt(sock, &ri, sizeof(ri));
case OP_SETMEMBLOCK:
- memblock = (void*)ri.gregs[R_A0];
+ memblock = (void *)(uintptr_t)get_reginfo_paramreg(&ri);
break;
case OP_GETMEMBLOCK:
- set_a0(uc, ri.gregs[R_A0] + (uintptr_t)memblock);
+ set_ucontext_paramreg(uc,
+ get_reginfo_paramreg(&ri) + (uintptr_t)memblock);
break;
case OP_COMPAREMEM:
return send_data_pkt(sock, memblock, MEMBLOCKLEN);
@@ -93,10 +99,11 @@ int recv_and_compare_register_info(int sock, void *uc)
send_response_byte(sock, resp);
break;
case OP_SETMEMBLOCK:
- memblock = (void*)master_ri.gregs[R_A0];
+ memblock = (void *)(uintptr_t)get_reginfo_paramreg(&master_ri);
break;
case OP_GETMEMBLOCK:
- set_a0(uc, master_ri.gregs[R_A0] + (uintptr_t)memblock);
+ set_ucontext_paramreg(uc, get_reginfo_paramreg(&master_ri) +
+ (uintptr_t)memblock);
break;
case OP_COMPAREMEM:
mem_used = 1;
diff --git a/risu_ppc64le.c b/risu_ppc64le.c
index 1c986a9..05b0294 100644
--- a/risu_ppc64le.c
+++ b/risu_ppc64le.c
@@ -30,10 +30,15 @@ void advance_pc(void *vuc)
uc->uc_mcontext.regs->nip += 4;
}
-void set_x0(void *vuc, uint64_t x0)
+void set_ucontext_paramreg(void *vuc, uint64_t value)
{
ucontext_t *uc = vuc;
- uc->uc_mcontext.gp_regs[0] = x0;
+ uc->uc_mcontext.gp_regs[0] = value;
+}
+
+uint64_t get_reginfo_paramreg(struct reginfo *ri)
+{
+ return ri->gregs[0];
}
static int get_risuop(uint32_t insn)
@@ -58,10 +63,11 @@ int send_register_info(int sock, void *uc)
default:
return send_data_pkt(sock, &ri, sizeof(ri));
case OP_SETMEMBLOCK:
- memblock = (void*)ri.gregs[0];
+ memblock = (void*)get_reginfo_paramreg(&ri);
break;
case OP_GETMEMBLOCK:
- set_x0(uc, ri.gregs[0] + (uintptr_t)memblock);
+ set_ucontext_paramreg(uc,
+ get_reginfo_paramreg(&ri) + (uintptr_t)memblock);
break;
case OP_COMPAREMEM:
return send_data_pkt(sock, memblock, MEMBLOCKLEN);
@@ -98,10 +104,11 @@ int recv_and_compare_register_info(int sock, void *uc)
send_response_byte(sock, resp);
break;
case OP_SETMEMBLOCK:
- memblock = (void*)master_ri.gregs[0];
+ memblock = (void*)get_reginfo_paramreg(&master_ri);
break;
case OP_GETMEMBLOCK:
- set_x0(uc, master_ri.gregs[0] + (uintptr_t)memblock);
+ set_ucontext_paramreg(uc, get_reginfo_paramreg(&master_ri) +
+ (uintptr_t)memblock);
break;
case OP_COMPAREMEM:
mem_used = 1;
--
2.7.4
- [Qemu-devel] [PATCH risu 0/9] risu: refactor and reduce CPU-specific code, Peter Maydell, 2017/02/24
- [Qemu-devel] [PATCH risu 1/9] Drop the weird modification of a ucontext in the ppc reginfo_is_eq(), Peter Maydell, 2017/02/24
- [Qemu-devel] [PATCH risu 9/9] Tidy up #include lines, Peter Maydell, 2017/02/24
- [Qemu-devel] [PATCH risu 7/9] Move send_register_info() to reginfo.c, Peter Maydell, 2017/02/24
- [Qemu-devel] [PATCH risu 8/9] Move recv_and_compare_register_info() and report_match_status() to reginfo.c, Peter Maydell, 2017/02/24
- [Qemu-devel] [PATCH risu 6/9] Make reginfo_{init, is_eq, dump, dump_mismatch} official per-CPU API, Peter Maydell, 2017/02/24
- [Qemu-devel] [PATCH risu 3/9] Make get_risuop() a formal part of the CPU interface, Peter Maydell, 2017/02/24
- [Qemu-devel] [PATCH risu 5/9] m68k: Drop unused ucontext_t* argument to reginfo_is_eq(), Peter Maydell, 2017/02/24
- [Qemu-devel] [PATCH risu 2/9] Abstract out getting and setting parameter register,
Peter Maydell <=
- [Qemu-devel] [PATCH risu 4/9] ppc64le, m68k: Make reginfo_dump() API match arm, aarch64, Peter Maydell, 2017/02/24
- Re: [Qemu-devel] [PATCH risu 0/9] risu: refactor and reduce CPU-specific code, Laurent Vivier, 2017/02/24