+ TCGv_i32 tmp = tcg_temp_local_new_i32();
+ TCGv t0;
+ tcg_gen_movi_i32(tmp, 0);
tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so);
l1 = gen_new_label();
tcg_gen_brcond_tl(TCG_COND_NE, EA, cpu_reserve, l1);
- tcg_gen_ori_i32(cpu_crf[0], cpu_crf[0], CRF_EQ);
- tcg_gen_qemu_st_tl(cpu_gpr[reg], EA, ctx->mem_idx, memop);
+
+ t0 = tcg_temp_new();
+ tcg_gen_atomic_cmpxchg_tl(t0, EA, cpu_reserve_val, cpu_gpr[reg],
+ ctx->mem_idx, DEF_MEMOP(memop));
+ tcg_gen_setcond_tl(TCG_COND_EQ, t0, t0, cpu_reserve_val);
+ tcg_gen_trunc_tl_i32(tmp, t0);
+
gen_set_label(l1);
+ tcg_gen_shli_i32(tmp, tmp, CRF_EQ_BIT);
+ tcg_gen_or_i32(cpu_crf[0], cpu_crf[0], tmp);