Re: [Qemu-devel] [PATCH 6/8] target/mips: optimize bshfl() using extract op

[Philippe Mathieu-Daudé]

Hi,

As noticed by Richard in another patch, this one is also WRONG:

$ docker run -it -v `pwd`:`pwd` -w `pwd` petersenna/coccinelle --sp-file 
scripts/coccinelle/tcg_gen_extract.cocci --macro-file 
scripts/cocci-macro-file.h target/mips/translate.c
init_defs_builtins: /usr/lib64/coccinelle/standard.h
init_defs: scripts/cocci-macro-file.h
HANDLING: target/mips/translate.c
candidate at target/mips/translate.c:4576
  op_size: tl/tl (same)
  low_bits: 8 (value: 0xff)
  len: 0xff00ff
  len_bits != low_bits
  candidate is NOT optimizable

candidate at target/mips/translate.c:4596
  op_size: tl/tl (same)
  low_bits: 8 (value: 0xff)
  len: 0xff00ff00ff00ff
  len_bits != low_bits
  candidate is NOT optimizable

candidate at target/mips/translate.c:4608
  op_size: tl/tl (same)
  low_bits: 16 (value: 0xffff)
  len: 0xffff0000ffff
  len_bits != low_bits
  candidate is NOT optimizable

On 05/10/2017 05:05 PM, Philippe Mathieu-Daudé wrote:
> Applied using Coccinelle script.
>
> Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
> ---
>  target/mips/translate.c | 9 +++------
>  1 file changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index 3022f349cb..96177da9ae 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -4573,8 +4573,7 @@ static void gen_bshfl (DisasContext *ctx, uint32_t op2, 
> int rt, int rd)
>          {
>              TCGv t1 = tcg_temp_new();
>
> -            tcg_gen_shri_tl(t1, t0, 8);
> -            tcg_gen_andi_tl(t1, t1, 0x00FF00FF);
> +            tcg_gen_extract_tl(t1, t0, 8, 0x00FF00FF);
>              tcg_gen_shli_tl(t0, t0, 8);
>              tcg_gen_andi_tl(t0, t0, ~0x00FF00FF);
>              tcg_gen_or_tl(t0, t0, t1);
> @@ -4593,8 +4592,7 @@ static void gen_bshfl (DisasContext *ctx, uint32_t op2, 
> int rt, int rd)
>          {
>              TCGv t1 = tcg_temp_new();
>
> -            tcg_gen_shri_tl(t1, t0, 8);
> -            tcg_gen_andi_tl(t1, t1, 0x00FF00FF00FF00FFULL);
> +            tcg_gen_extract_tl(t1, t0, 8, 0x00FF00FF00FF00FFULL);
>              tcg_gen_shli_tl(t0, t0, 8);
>              tcg_gen_andi_tl(t0, t0, ~0x00FF00FF00FF00FFULL);
>              tcg_gen_or_tl(cpu_gpr[rd], t0, t1);
> @@ -4605,8 +4603,7 @@ static void gen_bshfl (DisasContext *ctx, uint32_t op2, 
> int rt, int rd)
>          {
>              TCGv t1 = tcg_temp_new();
>
> -            tcg_gen_shri_tl(t1, t0, 16);
> -            tcg_gen_andi_tl(t1, t1, 0x0000FFFF0000FFFFULL);
> +            tcg_gen_extract_tl(t1, t0, 16, 0x0000FFFF0000FFFFULL);
>              tcg_gen_shli_tl(t0, t0, 16);
>              tcg_gen_andi_tl(t0, t0, ~0x0000FFFF0000FFFFULL);
>              tcg_gen_or_tl(t0, t0, t1);